17837613. SEMICONDUCTOR DEVICE WITH DIELECTRIC LINERS ON GATE REFILL METAL simplified abstract (Taiwan Semiconductor Manufacturing Co., Ltd.)

SEMICONDUCTOR DEVICE WITH DIELECTRIC LINERS ON GATE REFILL METAL

Organization Name

Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor(s)

Yuan-Hsiang Wu of Changhua County (TW)

Jia-Chuan You of Taoyuan City (TW)

Chia-Hao Chang of Hsinchu City (TW)

Kuo-Cheng Chiang of Hsinchu County (TW)

Chih-Hao Wang of Hsinchu County (TW)

SEMICONDUCTOR DEVICE WITH DIELECTRIC LINERS ON GATE REFILL METAL - A simplified explanation of the abstract

This abstract first appeared for US patent application 17837613 titled 'SEMICONDUCTOR DEVICE WITH DIELECTRIC LINERS ON GATE REFILL METAL

Simplified Explanation

The patent application describes a device that includes various components such as a gate structure, gate spacers, source/drain regions, a refill metal structure, and a dielectric liner. These components are arranged in a specific configuration to improve the performance and functionality of the device.

• The device includes a gate structure placed on a substrate.
• Two gate spacers are positioned on opposite sides of the gate structure.
• Source/drain regions are located at a distance from the gate structure, partially separated by the gate spacers.
• A refill metal structure is present on the gate structure, positioned between the two gate spacers.
• A dielectric liner is placed on top of the gate structure, serving as a barrier between the refill metal structure and the first gate spacer.

Potential applications of this technology:

• This device configuration can be used in various electronic devices such as transistors, integrated circuits, and microprocessors.
• It can enhance the performance and efficiency of these electronic devices, leading to improved functionality and faster processing speeds.

Problems solved by this technology:

• The specific arrangement of the gate structure, gate spacers, and refill metal structure helps to reduce leakage current and improve the overall performance of the device.
• It addresses issues related to the proximity of the source/drain regions to the gate structure, ensuring proper separation and minimizing interference.

Benefits of this technology:

• The device configuration described in the patent application can lead to improved performance, efficiency, and functionality of electronic devices.
• It can help in achieving faster processing speeds and reducing power consumption.
• The reduction in leakage current can enhance the reliability and lifespan of the device.

Original Abstract Submitted

A device includes a gate structure, first and second gate spacers, source/drain regions, a refill metal structure, and a first dielectric liner. The gate structure is on a substrate. The first and second gate spacers are on opposite sides of the gate structure, respectively. The source/drain regions are spaced part from the gate structure at least in part by the first and second gate spacers. The refill metal structure is on the gate structure and between the first and second gate spacers. The first di electric liner is atop the gate structure. The first dielectric liner interposes the refill metal structure and the first gate spacer.