17836634. MEMORY ARRAYS EMPLOYING FLYING BIT LINES TO INCREASE EFFECTIVE BIT LINE LENGTH FOR SUPPORTING HIGHER PERFORMANCE, INCREASED MEMORY DENSITY, AND RELATED METHODS simplified abstract (Microsoft Technology Licensing, LLC)
Contents
- 1 MEMORY ARRAYS EMPLOYING FLYING BIT LINES TO INCREASE EFFECTIVE BIT LINE LENGTH FOR SUPPORTING HIGHER PERFORMANCE, INCREASED MEMORY DENSITY, AND RELATED METHODS
- 1.1 Organization Name
- 1.2 Inventor(s)
- 1.3 MEMORY ARRAYS EMPLOYING FLYING BIT LINES TO INCREASE EFFECTIVE BIT LINE LENGTH FOR SUPPORTING HIGHER PERFORMANCE, INCREASED MEMORY DENSITY, AND RELATED METHODS - A simplified explanation of the abstract
- 1.4 Simplified Explanation
- 1.5 Original Abstract Submitted
MEMORY ARRAYS EMPLOYING FLYING BIT LINES TO INCREASE EFFECTIVE BIT LINE LENGTH FOR SUPPORTING HIGHER PERFORMANCE, INCREASED MEMORY DENSITY, AND RELATED METHODS
Organization Name
Microsoft Technology Licensing, LLC
Inventor(s)
Robert A. Sweitzer of Cary NC (US)
MEMORY ARRAYS EMPLOYING FLYING BIT LINES TO INCREASE EFFECTIVE BIT LINE LENGTH FOR SUPPORTING HIGHER PERFORMANCE, INCREASED MEMORY DENSITY, AND RELATED METHODS - A simplified explanation of the abstract
This abstract first appeared for US patent application 17836634 titled 'MEMORY ARRAYS EMPLOYING FLYING BIT LINES TO INCREASE EFFECTIVE BIT LINE LENGTH FOR SUPPORTING HIGHER PERFORMANCE, INCREASED MEMORY DENSITY, AND RELATED METHODS
Simplified Explanation
The patent application describes memory arrays that use flying bit lines to increase the effective bit line length, resulting in higher performance and increased memory density. Here are the key points:
- The memory array includes a first memory sub-bank and one or more second memory sub-banks.
- The first memory sub-bank has a first bit line for each memory column circuit.
- To avoid extending the length of the first bit lines to reach the second memory cells in the second sub-bank, each sub-bank has its own dedicated first and second bit lines.
- The second bit lines "fly" independently of the first bit lines, allowing them to access the memory cells in the second sub-bank without extending the length of the first bit lines.
- This design eliminates the need to extend the first bit lines, simplifying the memory array structure and increasing memory density.
Potential applications of this technology:
- Memory devices in computers, smartphones, and other electronic devices.
- High-performance computing systems.
- Data centers and cloud computing infrastructure.
Problems solved by this technology:
- Limited memory density due to the need to extend bit lines.
- Performance limitations caused by longer bit lines.
- Complex and costly memory array structures.
Benefits of this technology:
- Increased memory density, allowing for more data storage in the same physical space.
- Improved memory performance and access speed.
- Simplified memory array structure, reducing manufacturing complexity and cost.
Original Abstract Submitted
Memory arrays employing flying bit lines to increase effective bit line length for supporting higher performance, increased memory density, and related methods. To increase memory density, the memory array has a first memory sub-bank and one or more second memory sub-banks. The first memory sub-bank includes a first bit line(s) for each of its memory column circuits. To avoid the need to extend the length of the first bit lines to be coupled to the second memory bit cells in the second memory sub-bank, each memory sub-bank has its own dedicated first and second bit lines coupling their respective memory bit cells to access circuitry. The second bit lines effectively “fly” independent of the first bit lines of the first memory sub-bank. The first bit lines of the first memory sub-bank do not have to be extended in length to provide bit lines for the second memory sub-bank.
