17832601. MEMORY DEVICE AND METHOD OF FORMING THE SAME simplified abstract (TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.)

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MEMORY DEVICE AND METHOD OF FORMING THE SAME

Organization Name

TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

Inventor(s)

Hsin-Wen Su of Hsinchu (TW)

Jui-Lin Chen of Taipei City (TW)

Shih-Hao Lin of Hsinchu (TW)

Chih-Chuan Yang of Hsinchu (TW)

Ming-Yen Chuang of Hsinchu City (TW)

Chenchen Jacob Wang of Hsinchu (TW)

Ping-Wei Wang of Hsin-Chu (TW)

MEMORY DEVICE AND METHOD OF FORMING THE SAME - A simplified explanation of the abstract

This abstract first appeared for US patent application 17832601 titled 'MEMORY DEVICE AND METHOD OF FORMING THE SAME

Simplified Explanation

The abstract describes a memory device that includes a transistor and various components for connecting and accessing the memory structure. Here are the key points:

  • The memory device includes a transistor with two source/drain (S/D) regions.
  • There are two S/D contacts, one over each S/D region, extending in different directions.
  • Two vias, one landing on each S/D contact, provide connections for accessing the memory structure.
  • The first via is longer in a direction different from the second via.
  • The first via is coupled to a first conductive line, and the second via is coupled to a second conductive line.
  • The memory structure is located above the transistor and connected to the second conductive line.

Potential applications of this technology:

  • Memory devices in electronic devices such as smartphones, tablets, and computers.
  • Data storage and retrieval in various computing systems.
  • Integration into integrated circuits for improved memory capabilities.

Problems solved by this technology:

  • Efficient connection and access to the memory structure in a memory device.
  • Optimization of space and layout in the memory device.
  • Enhanced performance and reliability of the memory device.

Benefits of this technology:

  • Improved memory device functionality and performance.
  • Enhanced data storage and retrieval capabilities.
  • Increased efficiency and reliability in memory operations.


Original Abstract Submitted

Some embodiments relate to a memory device. The memory device includes a transistor having a first source/drain (S/D) region and a second S/D region, a first S/D contact disposed over the first S/D region, the first S/D contact extending lengthwise in a first direction, a second S/D contact disposed over the second S/D region, a first via landing on the first S/D contact, the first via extending lengthwise in a second direction different from the first direction, a second via landing on the second S/D contact, the first via having a length measured in the second direction that is larger than the second via, a first conductive line coupled to the first via, a second conductive line coupled to the second via, and a memory structure disposed above the transistor and coupled to the second conductive line.