17831284. MEMORY CONTROLLER AND STORAGE DEVICE simplified abstract (Samsung Electronics Co., Ltd.)
Contents
MEMORY CONTROLLER AND STORAGE DEVICE
Organization Name
Inventor(s)
Seong Wan Hong of Hwaseong-si (KR)
MEMORY CONTROLLER AND STORAGE DEVICE - A simplified explanation of the abstract
This abstract first appeared for US patent application 17831284 titled 'MEMORY CONTROLLER AND STORAGE DEVICE
Simplified Explanation
The abstract describes a memory controller that includes a DMA master device, a program buffer memory, an exclusive OR computing circuit, and a buffer slave device.
- The DMA master device transfers data to a non-volatile memory (NVM) device.
- The program buffer memory temporarily stores the data before it is transferred to the NVM device.
- The exclusive OR computing circuit performs computations on the data to generate recovery data.
- The buffer slave device stores the recovery data and provides it back to the program buffer memory in case of a program failure signal.
Potential applications of this technology:
- Data storage systems
- Solid-state drives (SSDs)
- Embedded systems
Problems solved by this technology:
- Data integrity issues during data transfer to NVM devices
- Program failures that may result in data loss
Benefits of this technology:
- Improved data integrity and reliability
- Enhanced error recovery capabilities
- Increased system resilience against program failures
Original Abstract Submitted
A memory controller comprising a DMA master device configured to provide a first data group to a non-volatile memory (NVM) device, a program buffer memory configured to temporarily store the first data group before the DMA master device provides the first data group to the NVM device, an exclusive OR computing circuit configured to perform an exclusive OR computation and an accumulation on a plurality of data included in the first data group provided from the program buffer memory to generate a first recovery data, after the DMA master device provides the first data group to the NVM device, and a buffer slave device including a first program recovery buffer memory configured to store the first recovery data and provide the first recovery data from the first program recovery buffer memory to the program buffer memory, in response to a program failure signal, may be provided.
