17827751. WIRING SUBSTRATE, METHOD OF FABRICATING THE SAME, AND METHOD OF FABRICATING SEMICONDUCTOR PACKAGE INCLUDING THE SAME simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)
WIRING SUBSTRATE, METHOD OF FABRICATING THE SAME, AND METHOD OF FABRICATING SEMICONDUCTOR PACKAGE INCLUDING THE SAME
Organization Name
Inventor(s)
SUNNYEONG Jung of Asan-si (KR)
WIRING SUBSTRATE, METHOD OF FABRICATING THE SAME, AND METHOD OF FABRICATING SEMICONDUCTOR PACKAGE INCLUDING THE SAME - A simplified explanation of the abstract
This abstract first appeared for US patent application 17827751 titled 'WIRING SUBSTRATE, METHOD OF FABRICATING THE SAME, AND METHOD OF FABRICATING SEMICONDUCTOR PACKAGE INCLUDING THE SAME
Simplified Explanation
The patent application describes a wiring substrate used in semiconductor packages and methods for fabricating them. The substrate includes a dielectric layer with unit regions, a sawing region, and an edge region. It also includes a first upper protection pattern on the unit regions and sawing region, and a second upper protection pattern on the edge region. The second pattern is made of a different dielectric material than the first pattern.
- The patent application describes a wiring substrate for semiconductor packages.
- The substrate has a dielectric layer with unit regions, a sawing region, and an edge region.
- It includes a first upper protection pattern on the unit regions and sawing region.
- It also includes a second upper protection pattern on the edge region.
- The second pattern is made of a different dielectric material than the first pattern.
Potential applications of this technology:
- Semiconductor packaging industry
- Electronics manufacturing industry
Problems solved by this technology:
- Protection of the wiring substrate in semiconductor packages
- Enhanced reliability and durability of the substrate
Benefits of this technology:
- Improved protection of the unit regions, sawing region, and edge region of the wiring substrate
- Increased reliability and durability of semiconductor packages
- Potential for improved performance and longevity of electronic devices.
Original Abstract Submitted
Disclosed are wiring substrates, methods of fabricating the same, and methods of fabricating semiconductor packages. The wiring substrate includes a dielectric layer that includes a plurality of unit regions, a sawing region that surrounds each of the unit regions, and an edge region that surrounds the unit regions and the sawing region, a first upper protection pattern on a top surface of the dielectric layer on the unit regions and the sawing region, and a second upper protection pattern on a top surface of the dielectric layer on the edge region. The second upper protection pattern surrounds the first upper protection pattern when viewed in plan and includes a dielectric material different from a dielectric material of the first upper protection pattern.