17823508. EMBEDDED SOI STRUCTURE FOR LOW LEAKAGE MOS CAPACITOR simplified abstract (Taiwan Semiconductor Manufacturing Company, Ltd.)
Contents
EMBEDDED SOI STRUCTURE FOR LOW LEAKAGE MOS CAPACITOR
Organization Name
Taiwan Semiconductor Manufacturing Company, Ltd.
Inventor(s)
Chung-Lei Chen of Hsinchu (TW)
EMBEDDED SOI STRUCTURE FOR LOW LEAKAGE MOS CAPACITOR - A simplified explanation of the abstract
This abstract first appeared for US patent application 17823508 titled 'EMBEDDED SOI STRUCTURE FOR LOW LEAKAGE MOS CAPACITOR
Simplified Explanation
The method described in the patent application involves forming a semiconductor device by implanting n-type impurities into a device region in a semiconductor substrate, forming an epitaxial layer, and creating a trench surrounding the device region.
- Implant n-type impurities into a device region in the semiconductor substrate to form an implanted region and an un-implanted region.
- Form an epitaxial layer on the semiconductor substrate.
- Create a trench surrounding the device region in direct contact with the implanted region.
- Perform a selective lateral etch through the trench to remove the implanted region and form a cavity under the epitaxial layer.
- Retain the un-implanted region to form a pillar under the epitaxial layer.
- Dispose an insulating material in the cavity and the trench to separate a single crystalline region from the semiconductor substrate, except at the pillar.
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- Potential Applications
- Semiconductor devices manufacturing
- Integrated circuits fabrication
- Power electronics
- Problems Solved
- Improved isolation of single crystalline regions
- Enhanced performance of semiconductor devices
- Increased efficiency in manufacturing processes
- Benefits
- Higher quality semiconductor devices
- Improved reliability and durability
- Enhanced performance and efficiency in electronic devices
Original Abstract Submitted
A method for forming a semiconductor device includes providing a semiconductor substrate, implanting n-type impurities into a device region in the semiconductor substrate to form an implanted region and an un-implanted region. The method also includes forming an epitaxial layer on the semiconductor substrate and forming a trench surrounding the device region in direct contact with the implanted region. The method further includes performing a selective lateral etch through the trench to remove the implanted region to form a cavity under the epitaxial layer. The un-implanted region is retained to form a pillar under the epitaxial layer. Next, an insulating material is disposed in the cavity and the trench. The method forms a single crystalline region that is separated from the semiconductor substrate by the insulating material except at the pillar.
