17822173. STACKED FET SUBSTRATE CONTACT simplified abstract (International Business Machines Corporation)
Contents
STACKED FET SUBSTRATE CONTACT
Organization Name
International Business Machines Corporation
Inventor(s)
Jay William Strane of Warwick NY (US)
Gen Tsutsui of Glenmont NY (US)
STACKED FET SUBSTRATE CONTACT - A simplified explanation of the abstract
This abstract first appeared for US patent application 17822173 titled 'STACKED FET SUBSTRATE CONTACT
Simplified Explanation
The abstract describes a stacked field effect transistor (FET) device with an opening in a shallow trench isolation (STI) region on a substrate, an epitaxy region at the bottom of the STI region in the opening, and a substrate contact directly contacting the epitaxy region.
- The device is a stacked field effect transistor (FET) device.
- The device includes an opening in a shallow trench isolation (STI) region on a substrate.
- An epitaxy region is located on the substrate at the bottom portion of the STI region in the opening.
- A substrate contact directly contacts the epitaxy region.
Potential Applications
This technology could be used in:
- Integrated circuits
- Power amplifiers
- Memory devices
Problems Solved
This technology addresses issues related to:
- Improved performance of field effect transistors
- Enhanced contact between substrate and epitaxy region
- Better isolation in stacked FET devices
Benefits
The benefits of this technology include:
- Higher efficiency in power amplifiers
- Increased speed and performance in integrated circuits
- Improved reliability in memory devices
Original Abstract Submitted
A stacked field effect transistor (FET) device. The device includes an opening in a shallow trench isolation (STI) region on a substrate. The device also includes an epitaxy region located on the substrate at a bottom portion of STI region in the opening. The device further includes a substrate contact that directly contacts the epitaxy region.
