17821609. CROSS-CORE INVALIDATION SNAPSHOT MANAGEMENT simplified abstract (International Business Machines Corporation)

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CROSS-CORE INVALIDATION SNAPSHOT MANAGEMENT

Organization Name

International Business Machines Corporation

Inventor(s)

Richard Joseph Branciforte of Austin TX (US)

Gregory William Alexander of Pflugerville TX (US)

Timothy Bronson of Round Rock TX (US)

Deanna Postles Dunn Berger of Hyde Park NY (US)

Akash V. Giri of Austin TX (US)

Aaron Tsai of Hyde Park NY (US)

CROSS-CORE INVALIDATION SNAPSHOT MANAGEMENT - A simplified explanation of the abstract

This abstract first appeared for US patent application 17821609 titled 'CROSS-CORE INVALIDATION SNAPSHOT MANAGEMENT

Simplified Explanation

The abstract describes a lower-level cache management system that handles cross-core invalidation (XI) snapshots in a shared-memory multiprocessing system. This system reduces the number of required snapshots while allowing shared lower-level caches.

  • The lower-level cache maintains response sync state for multiple processors, indicating if a line may have been changed by another processor since it was last fetched by a requesting processor.

Potential Applications

  • Shared-memory multiprocessing systems
  • Cache management in multi-core processors

Problems Solved

  • Reducing the number of required snapshots in cache management
  • Handling cross-core invalidation efficiently

Benefits

  • Improved performance in shared-memory multiprocessing systems
  • Reduced overhead in cache management
  • Enhanced synchronization between processors


Original Abstract Submitted

A lower-level cache managing cross-core invalidation (XI) snapshots in a shared-memory multiprocessing system, wherein the management of XI snapshots reduces an amount of required snapshots while allowing shared lower-level caches, comprising: the lower-level cache maintaining respective response sync state for at least one processor in a plurality of processors signifying that a line may have been changed by another processor since last fetched by a requesting processor.

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