17820280. NONVOLATILE MEMORY DEVICE AND METHOD OF OPERATING NONVOLATILE MEMORY simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)

NONVOLATILE MEMORY DEVICE AND METHOD OF OPERATING NONVOLATILE MEMORY

Organization Name

SAMSUNG ELECTRONICS CO., LTD.

Inventor(s)

Hyunee Lee of Suwon-si (KR)

Jongyeol Park of Suwon-si (KR)

NONVOLATILE MEMORY DEVICE AND METHOD OF OPERATING NONVOLATILE MEMORY - A simplified explanation of the abstract

This abstract first appeared for US patent application 17820280 titled 'NONVOLATILE MEMORY DEVICE AND METHOD OF OPERATING NONVOLATILE MEMORY

Simplified Explanation

The patent application describes a nonvolatile memory device that includes a memory cell array, an address decoder, a leakage detector, and a control circuit. The device is designed to detect and mitigate leakage in word-lines of the memory cell array.

• The memory cell array consists of multiple mats corresponding to different bit-lines.
• The leakage detector is connected to the mats through a sensing node in the address decoder.
• The control circuit performs a first leakage detection operation on a selected number of mats to identify any leakage in the word-lines.
• If leakage is detected, the control circuit inhibits at least one mat and performs a second leakage detection operation on a target mat from the remaining mats.

Potential applications of this technology:

• Nonvolatile memory devices used in various electronic devices such as smartphones, tablets, and computers.
• Storage systems in data centers and servers.
• Embedded memory in automotive electronics, IoT devices, and wearable devices.

Problems solved by this technology:

• Leakage in word-lines of memory cell arrays can lead to data corruption and reliability issues.
• Detecting and mitigating leakage is crucial for maintaining the integrity of stored data.
• The proposed solution allows for efficient detection and isolation of mats with leakage, improving overall memory performance.

Benefits of this technology:

• Improved reliability and data integrity in nonvolatile memory devices.
• Efficient detection and mitigation of leakage in word-lines.
• Enhanced performance and longevity of memory cell arrays.
• Cost-effective solution for addressing leakage issues in nonvolatile memory devices.

Original Abstract Submitted

A nonvolatile memory device includes a memory cell array, an address decoder, a leakage detector and a control circuit. The memory cell array includes a plurality of mats corresponding to different bit-lines. The leakage detector is commonly coupled to the plurality of mats at a sensing node in the address decoder. The control circuit performs a first leakage detection operation on M mats selected from the mats to determine a leakage of at least a portion of word-lines of the M mats in an N multi-mat mode, in response to the leakage of at least the portion of word-lines of the M mats being detected based on a result of the first leakage detection operation, inhibits at least one mat of the M mats, and performs a second leakage detection operation on at least one target mat from among the M mats except the inhibited mat.