17809030. SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF simplified abstract (Taiwan Semiconductor Manufacturing Company, Ltd.)
Contents
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
Organization Name
Taiwan Semiconductor Manufacturing Company, Ltd.
Inventor(s)
Chia-Ling Chung of Hsinchu (TW)
Chun-Chih Cheng of Hsinchu (TW)
Ying-Liang Chuang of Hsinchu (TW)
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - A simplified explanation of the abstract
This abstract first appeared for US patent application 17809030 titled 'SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
Simplified Explanation
The patent application describes a semiconductor device and a method for fabricating it. The device includes a substrate with a metal gate, gate spacers, an etch stop layer, and interlayer dielectric material. It also includes a tungsten cap formed from tungsten material deposited over the metal gate and between the gate spacers. A via gate is formed above the tungsten cap.
- The semiconductor device includes a metal gate, gate spacers, an etch stop layer, and interlayer dielectric material.
- A tungsten cap is formed by depositing tungsten material over the metal gate and between the gate spacers.
- A via gate is formed above the tungsten cap.
Potential applications of this technology:
- Semiconductor manufacturing
- Integrated circuits
- Electronics industry
Problems solved by this technology:
- Provides a method for fabricating a semiconductor device with improved performance and reliability.
- Helps to prevent unwanted leakage and short circuits in the device.
- Enhances the overall efficiency and functionality of the device.
Benefits of this technology:
- Improved performance and reliability of semiconductor devices.
- Reduced risk of leakage and short circuits.
- Enhanced efficiency and functionality of the devices.
Original Abstract Submitted
Disclosed is a semiconductor device and semiconductor fabrication method. A semiconductor device includes: a substrate having a metal gate, gate spacers on sides of the metal gate, an etch stop layer (ESL), and interlayer dielectric (ILD) material over a source/drain region; a tungsten (W) cap formed from W material deposited over the metal gate and between the gate spacers; and a via gate (VG) formed above the W cap. A semiconductor fabrication method includes: receiving a substrate having a metal gate, gate spacers on sides of the metal gate, an etch stop layer (ESL), and interlayer dielectric (ILD) material over a source/drain region; depositing tungsten (W) material over the substrate; removing unwanted W material to form a W cap; and forming a via gate (VG) on the W cap.
