17808916. PROVIDING EXTENDED BRANCH TARGET BUFFER (BTB) ENTRIES FOR STORING TRUNK BRANCH METADATA AND LEAF BRANCH METADATA simplified abstract (Microsoft Technology Licensing, LLC)

PROVIDING EXTENDED BRANCH TARGET BUFFER (BTB) ENTRIES FOR STORING TRUNK BRANCH METADATA AND LEAF BRANCH METADATA

Organization Name

Microsoft Technology Licensing, LLC

Inventor(s)

Saransh Jain of Raleigh NC (US)

Rami Mohammad Al Sheikh of Morrisville NC (US)

Daren Eugene Streett of Cary NC (US)

Michael Scott Mcilvaine of Raleigh NC (US)

PROVIDING EXTENDED BRANCH TARGET BUFFER (BTB) ENTRIES FOR STORING TRUNK BRANCH METADATA AND LEAF BRANCH METADATA - A simplified explanation of the abstract

This abstract first appeared for US patent application 17808916 titled 'PROVIDING EXTENDED BRANCH TARGET BUFFER (BTB) ENTRIES FOR STORING TRUNK BRANCH METADATA AND LEAF BRANCH METADATA

Simplified Explanation

The abstract describes a patent application for an extended branch target buffer (BTB) that can store trunk branch metadata and leaf branch metadata. The BTB circuit in a processor is designed to store trunk branch metadata for a first branch instruction in an extended BTB entry, which corresponds to a memory block containing the address of the first branch instruction. It also stores leaf branch metadata for a second branch instruction in the same extended BTB entry, along with the trunk branch metadata. The address of the second branch instruction is located after the target address of the first branch instruction in a different memory block.

• The patent application is for an extended branch target buffer (BTB) that can store both trunk branch metadata and leaf branch metadata.
• The BTB circuit in a processor is configured to store trunk branch metadata for a first branch instruction in an extended BTB entry.
• The extended BTB entry corresponds to a memory block that contains the address of the first branch instruction.
• The BTB circuit is also designed to store leaf branch metadata for a second branch instruction in the same extended BTB entry, along with the trunk branch metadata.
• The address of the second branch instruction is located after the target address of the first branch instruction in a different memory block.

Potential Applications

• This technology can be applied in processors to improve branch prediction accuracy and performance.
• It can be used in various computing systems that rely on branch instructions, such as servers, desktop computers, and mobile devices.

Problems Solved

• The extended BTB entries allow for more efficient storage of branch metadata, reducing the need for additional memory.
• Storing both trunk branch metadata and leaf branch metadata in the same extended BTB entry improves the accuracy of branch prediction.

Benefits

• Improved branch prediction accuracy leads to better overall processor performance.
• The extended BTB entries optimize memory usage by storing multiple types of branch metadata in a single entry.

Original Abstract Submitted

Providing extended branch target buffer (BTB) entries for storing trunk branch metadata and leaf branch metadata is disclosed herein. In one aspect, a processor comprises a BTB circuit comprising a BTB comprising a plurality of extended BTB entries. The BTB circuit is configured to store trunk branch metadata for a first branch instruction in an extended BTB entry of the plurality of extended BTB entries, wherein the extended BTB entry corresponds to a first aligned memory block containing an address of the first branch instruction. The BTB circuit is also configured to store leaf branch metadata for a second branch instruction in the extended BTB entry in association with the trunk branch metadata, wherein an address of the second branch instruction is subsequent to a target address of the first branch instruction within a second aligned memory block.