17808186. SEMICONDUCTOR DEVICE WITH POWER VIA simplified abstract (INTERNATIONAL BUSINESS MACHINES CORPORATION)

SEMICONDUCTOR DEVICE WITH POWER VIA

Organization Name

INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor(s)

Ruilong Xie of Niskayuna NY (US)

Junli Wang of Slingerlands NY (US)

Kisik Choi of Watervliet NY (US)

Julien Frougier of Albany NY (US)

Reinaldo Vega of Mahopac NY (US)

Lawrence A. Clevenger of Saratoga Springs NY (US)

Albert M. Chu of Nashua NH (US)

Brent A. Anderson of Jericho VT (US)

SEMICONDUCTOR DEVICE WITH POWER VIA - A simplified explanation of the abstract

This abstract first appeared for US patent application 17808186 titled 'SEMICONDUCTOR DEVICE WITH POWER VIA

Simplified Explanation

The abstract describes a semiconductor device that includes a field effect transistor (FET) with source/drain (S/D) epitaxial regions, a gate cut region, a dielectric liner and core, a backside power rail (BPR) and distribution network (BSPDN), metal contacts, and a via to backside power rail (VBPR) contact. The dielectric liner separates the power via from the first S/D epitaxial region.

• The semiconductor device includes a field effect transistor (FET) with first and second source/drain (S/D) epitaxial regions.
• A gate cut region is present at cell boundaries between the first and second S/D epitaxial regions.
• A dielectric liner and core are formed in the gate cut region.
• A backside power rail (BPR) and a backside power distribution network (BSPDN) are included in the device.
• A power via passes through the dielectric core and connects to the BPR and BSPDN.
• First metal contacts are formed in contact with the first and second S/D epitaxial regions.
• A via to backside power rail (VBPR) contact is present.
• The dielectric liner separates the power via from the first S/D epitaxial region.

Potential Applications

• This semiconductor device can be used in various electronic devices that require efficient power distribution and management.

Problems Solved

• The device solves the problem of power distribution and management in a semiconductor device by providing a backside power rail and distribution network.

Benefits

• The device allows for efficient power distribution and management, improving the overall performance and reliability of electronic devices.

Original Abstract Submitted

A semiconductor device is provided. The semiconductor device includes a field effect transistor (FET) including first and second source/drain (S/D) epitaxial regions. The semiconductor device also includes a gate cut region at cell boundaries between the first and second S/D epitaxial regions, a dielectric liner and a dielectric core formed in the gate cut region, and a backside power rail (BPR) and a backside power distribution network (BSPDN). The semiconductor device also includes a power via passing through the dielectric core and connecting to the BPR and BSPDN, first metal contacts formed in contact with the first and second S/D epitaxial regions, and a via to backside power rail (VBPR) contact. The dielectric liner separates the power via from the first S/D epitaxial region.