17808175. ANISOTROPIC WET ETCHING IN PATTERNING simplified abstract (Taiwan Semiconductor Manufacturing Company, Ltd.)
Contents
ANISOTROPIC WET ETCHING IN PATTERNING
Organization Name
Taiwan Semiconductor Manufacturing Company, Ltd.
Inventor(s)
Ming-Chi Huang of Hsinchu (TW)
Ying-Liang Chuang of Hsinchu (TW)
ANISOTROPIC WET ETCHING IN PATTERNING - A simplified explanation of the abstract
This abstract first appeared for US patent application 17808175 titled 'ANISOTROPIC WET ETCHING IN PATTERNING
Simplified Explanation
The patent application describes a method for removing a metal layer from one structure while preserving the metal layer on another structure. The method involves using a chemical etchant that does not penetrate a photolithographic layer.
- The method involves providing two structures with metal layers.
- A patterned photolithographic layer is formed over the metal layer on the first structure.
- The metal layer on the second structure is removed using a wet etch process.
- The wet etch process uses a chemical etchant that does not penetrate the photolithographic layer.
- After the wet etch process, the remaining metal ratio is calculated as the distance X over the distance Y.
- The remaining metal ratio must be less than 179 and greater than 1.
- X is the distance from the edge of the metal layer on the first structure to the edge of the channel region in the second structure.
- Y is the distance from the edge of the metal layer on the first structure to the edge of the metal layer formed over the channel region in the first structure.
Potential applications of this technology:
- Semiconductor manufacturing
- Microelectronics fabrication
- Integrated circuit production
Problems solved by this technology:
- Precise removal of metal layers from specific structures without damaging other structures
- Preservation of metal layers on desired structures during wet etch processes
Benefits of this technology:
- Improved control and accuracy in metal layer removal
- Reduction in manufacturing defects and yield losses
- Cost savings in semiconductor and microelectronics production
Original Abstract Submitted
Disclosed is a method comprising: providing at least two structures with a metal layer over each; forming a patterned photolithographic layer over the metal layer over the first structure; removing the metal layer from the second structure via wet etch operations using a chemical etchant that is resistant to penetration into the photolithographic layer; and achieving, after wet etch operations, a remaining metal ratio of a distance X over a distance Y that is less than 179 and greater than 1, wherein X is the distance from a first line extending from an edge of the metal layer over the first structure to a second line extending from an edge of a channel region in the second structure, and Y is a second distance from the first line to a third line extending from an edge of the metal layer formed over the channel region in the first structure.
