17806570. HIGH ASPECT RATIO BURIED POWER RAIL METALLIZATION simplified abstract (INTERNATIONAL BUSINESS MACHINES CORPORATION)

From WikiPatents
Jump to navigation Jump to search

HIGH ASPECT RATIO BURIED POWER RAIL METALLIZATION

Organization Name

INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor(s)

Sagarika Mukesh of Albany NY (US)

Devika Sarkar Grant of Amsterdam NY (US)

FEE LI Lie of Albany NY (US)

Hosadurga Shobha of Niskayuna NY (US)

Thamarai selvi Devarajan of Niskayuna NY (US)

Aakrati Jain of Albany NY (US)

HIGH ASPECT RATIO BURIED POWER RAIL METALLIZATION - A simplified explanation of the abstract

This abstract first appeared for US patent application 17806570 titled 'HIGH ASPECT RATIO BURIED POWER RAIL METALLIZATION

Simplified Explanation

The patent application describes a semiconductor component that includes a trench formed in a substrate, with a dielectric material extending below the substrate's surface. The trench is coated with a non-metal liner, which is then coated with a metal liner. A power rail is formed in the trench, in direct contact with either the metal liner or the non-metal liner, extending into the dielectric material and above the substrate's surface.

  • A semiconductor component with a trench formed in a substrate
  • Dielectric material extending below the substrate's surface
  • Non-metal liner coating the interior surfaces of the trench
  • Metal liner coating the interior surfaces of the non-metal liner
  • Power rail formed in the trench, in contact with the metal or non-metal liner
  • Power rail extends into the dielectric material and above the substrate's surface

Potential Applications

  • Power electronics
  • Integrated circuits
  • Semiconductor devices

Problems Solved

  • Improved power distribution in semiconductor components
  • Enhanced electrical performance
  • Increased power handling capabilities

Benefits

  • Efficient power distribution
  • Enhanced electrical conductivity
  • Improved power handling capacity


Original Abstract Submitted

A semiconductor component includes an area of dielectric material extending below an uppermost surface of a substrate. The semiconductor component further includes a trench formed so as to extend from above the uppermost surface of the substrate into the area of dielectric material. The semiconductor component further includes a non-metal liner coating interior surfaces of the trench. The semiconductor component further includes a metal liner coating interior surfaces of the non-metal liner. The semiconductor component further includes a power rail formed in the trench in direct contact with at least one of the metal liner or the non-metal liner such that the power rail extends into the area of dielectric material and above the uppermost surface of the substrate.