17804742. SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME simplified abstract (Samsung Electronics Co., Ltd.)

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SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME

Organization Name

Samsung Electronics Co., Ltd.

Inventor(s)

JU HYUNG Lee of Siheung-si (KR)

DONG UK Kwon of Ansan-si (KR)

SUN CHUL Kim of Hwaseong-si (KR)

YONG HYUN Kim of Asan-si (KR)

MIN JAE Lee of Seoul (KR)

SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME - A simplified explanation of the abstract

This abstract first appeared for US patent application 17804742 titled 'SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME

Simplified Explanation

The abstract describes a method of fabricating a semiconductor package. Here is a simplified explanation of the abstract:

  • The method involves placing a preliminary semiconductor package on a stage.
  • The preliminary semiconductor package consists of a substrate with a pad part attached, an interposer placed on the substrate, and a semiconductor chip positioned between the substrate and the interposer.
  • A bonding tool is placed on the interposer, which has two regions - a first region and a second region outside of the first region.
  • The second region of the bonding tool corresponds to the pad part on the substrate.
  • The interposer and the substrate are bonded together using this method.

Potential applications of this technology:

  • Semiconductor packaging industry
  • Electronics manufacturing

Problems solved by this technology:

  • Efficient bonding of the interposer and substrate in semiconductor packaging
  • Simplified fabrication process

Benefits of this technology:

  • Improved reliability and performance of semiconductor packages
  • Cost-effective manufacturing process
  • Enhanced productivity in the semiconductor packaging industry


Original Abstract Submitted

A method of fabricating a semiconductor package includes disposing a preliminary semiconductor package on a stage, the preliminary semiconductor package including a substrate to which a pad part is attached, an interposer disposed on the substrate, and a semiconductor chip disposed between the substrate and the interposer. A bonding tool is disposed on the interposer. The bonding tool includes a first region and a second region outside of the first region. The second region of the bonding tool corresponds to the pad part. The interposer and the substrate are bonded to each other.