17746822. SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD OF SEMICONDUCTOR PACKAGE simplified abstract (Taiwan Semiconductor Manufacturing Co., Ltd.)
SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD OF SEMICONDUCTOR PACKAGE
Organization Name
Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor(s)
Hsien-Wei Chen of Hsinchu City (TW)
Meng-Liang Lin of Hsinchu (TW)
Kuan Liang Liu of New Taipei City (TW)
SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD OF SEMICONDUCTOR PACKAGE - A simplified explanation of the abstract
This abstract first appeared for US patent application 17746822 titled 'SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD OF SEMICONDUCTOR PACKAGE
Simplified Explanation
The abstract describes a semiconductor package that includes an interconnect structure, multiple dies arranged side by side on the structure, an underfill material filling the lower part of the gap between adjacent dies, a conductive layer covering the back surfaces of the adjacent dies and filling the upper part of the gap, and an encapsulating material surrounding the dies and conductive layer.
- The semiconductor package includes an interconnect structure and multiple dies arranged side by side.
- An underfill material fills the lower part of the gap between adjacent dies, providing structural support.
- A conductive layer covers the back surfaces of the adjacent dies and fills the upper part of the gap, enhancing electrical connectivity.
- An encapsulating material surrounds the dies and conductive layer, providing protection and stability.
Potential Applications
- This technology can be applied in various electronic devices that utilize semiconductor packages, such as smartphones, tablets, and computers.
- It can be used in automotive electronics, aerospace systems, and industrial equipment that require reliable and compact semiconductor packaging.
Problems Solved
- The underfill material and conductive layer address the challenge of maintaining structural integrity and electrical connectivity in a semiconductor package.
- The encapsulating material provides protection against environmental factors, such as moisture and temperature variations.
Benefits
- The interconnect structure and underfill material enhance the mechanical stability of the semiconductor package, reducing the risk of damage during handling and operation.
- The conductive layer improves electrical performance by ensuring efficient signal transmission between the dies.
- The encapsulating material offers protection against external factors, increasing the lifespan and reliability of the semiconductor package.
Original Abstract Submitted
A semiconductor package includes an interconnect structure, a plurality of dies disposed on the interconnect structure in a side-by-side manner, an underfill filling between the interconnect structure and the plurality of dies and filling a lower part of a gap between adjacent two of the plurality of dies, a conductive layer at least covering back surfaces of the adjacent two of the plurality of dies and filling an upper part of the gap, and an encapsulating material laterally encapsulating the plurality of dies and the conductive layer.
