17742874. NON-VOLATILE MEMORY DEVICE simplified abstract (Samsung Electronics Co., Ltd.)
Contents
NON-VOLATILE MEMORY DEVICE
Organization Name
Inventor(s)
Byungsoo Kim of Anyang-si (KR)
NON-VOLATILE MEMORY DEVICE - A simplified explanation of the abstract
This abstract first appeared for US patent application 17742874 titled 'NON-VOLATILE MEMORY DEVICE
Simplified Explanation
The patent application describes a non-volatile memory device that includes multiple word lines stacked vertically above a substrate. It also includes erase control lines that are spaced apart from each other and extend in a different direction. The device further comprises a pass transistor circuit and a memory cell array with multiple blocks.
- The word lines are stacked vertically above the substrate.
- Erase control lines are spaced apart and extend in a different direction.
- The pass transistor circuit includes two pass transistors connected to different groups of erase control lines.
- The memory cell array consists of multiple blocks, each with channel structures connected to the word lines and erase control lines.
- The first group of erase control lines is located close to a word line cut region, while the second group is farther away.
- Each channel structure extends vertically.
Potential Applications
- Non-volatile memory devices for various electronic devices such as smartphones, tablets, and computers.
- Storage devices for data centers and servers.
- Embedded memory in automotive electronics, IoT devices, and wearable technology.
Problems Solved
- Provides a more compact and efficient non-volatile memory device design.
- Enables vertical stacking of word lines, increasing memory density.
- Allows for better control and organization of erase control lines.
- Reduces the footprint of the memory cell array.
Benefits
- Increased memory density, allowing for more data storage in a smaller space.
- Improved performance and speed due to the efficient design.
- Enhanced reliability and durability of the non-volatile memory device.
- Cost-effective manufacturing process with simplified structure.
Original Abstract Submitted
A non-volatile memory device includes a plurality of word lines stacked above a substrate in a vertical direction; erase control lines that are spaced apart from each other in a first direction and extend in a second direction; a pass transistor circuit including a first pass transistor connected to a first group of erase control lines and a second pass transistor connected to a second group of erase control lines; and a memory cell array including a plurality of blocks. The first group of erase control lines are relatively close to a word line cut region and the second group of erase control lines are relatively far from the word line cut region. Each of the plurality of blocks includes a plurality of channel structures connected to the word lines and the erase control lines and each channel structure extends in the vertical direction.
