17736154. SEMICONDUCTOR MEMORY DEVICES AND MEMORY SYSTEMS simplified abstract (Samsung Electronics Co., Ltd.)

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SEMICONDUCTOR MEMORY DEVICES AND MEMORY SYSTEMS

Organization Name

Samsung Electronics Co., Ltd.

Inventor(s)

Sungrae Kim of Hwaseong-si (KR)

Sunghye Cho of Hwaseong-si (KR)

Yeonggeol Song of Seoul (KR)

Kijun Lee of Seoul (KR)

Myungkyu Lee of Seoul (KR)

SEMICONDUCTOR MEMORY DEVICES AND MEMORY SYSTEMS - A simplified explanation of the abstract

This abstract first appeared for US patent application 17736154 titled 'SEMICONDUCTOR MEMORY DEVICES AND MEMORY SYSTEMS

Simplified Explanation

The patent application describes a semiconductor memory device that includes a memory cell array, an on-die error correction code (ECC) engine, and a control logic circuit. The on-die ECC engine performs ECC encoding on main data during a write operation and generates first parity data. It selectively replaces a portion of the first parity data with a poison flag to generate second parity data based on a poison mode signal. The main data is provided to a normal cell region in a target page of the memory cell array, while the first parity data or the poison flag and the second parity data are provided to a parity cell region in the target page.

  • The semiconductor memory device includes a memory cell array, on-die ECC engine, and control logic circuit.
  • The on-die ECC engine performs ECC encoding on main data during a write operation.
  • It generates first parity data and selectively replaces a portion of it with a poison flag to generate second parity data.
  • The main data is provided to a normal cell region in the memory cell array.
  • The first parity data or the poison flag and the second parity data are provided to a parity cell region in the memory cell array.
  • The control logic circuit controls the on-die ECC engine and generates the poison mode signal based on a command and an address from a memory controller.

Potential Applications

  • This technology can be applied in various semiconductor memory devices such as RAM, flash memory, and solid-state drives.
  • It can be used in data storage systems where error correction is crucial to ensure data integrity.

Problems Solved

  • The on-die ECC engine provides error correction capabilities within the memory device itself, reducing the need for external error correction mechanisms.
  • The selective replacement of a portion of the first parity data with a poison flag allows for improved error detection and correction.

Benefits

  • By integrating the ECC engine on-die, the memory device becomes more efficient and reliable.
  • The selective replacement of parity data with a poison flag enhances error detection and correction capabilities.
  • The control logic circuit enables flexible control and adaptation of the ECC engine based on commands and addresses from the memory controller.


Original Abstract Submitted

A semiconductor memory device includes a memory cell array, an on-die error correction code (ECC) engine, and a control logic circuit. The on-die ECC engine, based on an ECC, in a write operation, performs an ECC encoding on main data to generate first parity data, selectively replaces a portion of the first parity data with a poison flag to generate second parity data based on a poison mode signal, provides the main data to a normal cell region in a target page of the memory cell array, and provides the first parity data to a parity cell region in the target page or provides the poison flag and the second parity data to the parity cell region. The control logic circuit controls the on-die ECC engine and generates the poison mode signal, based on a command and an address from a memory controller.

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