17735158. SEMICONDUCTOR PACKAGE ALIGNING INTERPOSER AND SUBSTRATE simplified abstract (Samsung Electronics Co., Ltd.)

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SEMICONDUCTOR PACKAGE ALIGNING INTERPOSER AND SUBSTRATE

Organization Name

Samsung Electronics Co., Ltd.

Inventor(s)

TAE HWAN Kim of ASAN-SI (KR)

HYUNG GIL Baek of SUWON-SI (KR)

YOUNG-JA Kim of CHEONAN-SI (KR)

KANG GYUNE Lee of SUWON-SI (KR)

SANG-WON Lee of SEOUL (KR)

YONG KWAN Lee of HWASEONG-SI (KR)

SEMICONDUCTOR PACKAGE ALIGNING INTERPOSER AND SUBSTRATE - A simplified explanation of the abstract

This abstract first appeared for US patent application 17735158 titled 'SEMICONDUCTOR PACKAGE ALIGNING INTERPOSER AND SUBSTRATE

Simplified Explanation

The abstract describes a semiconductor package that includes various components and their arrangement. Here is a simplified explanation of the abstract:

  • The semiconductor package consists of a first substrate, a first semiconductor chip, an interposer, a connector, a capacitor, and a guide pattern.
  • The first semiconductor chip is placed on the first substrate.
  • The interposer is positioned on top of the first semiconductor chip.
  • The connector connects the first substrate and the interposer directly, while being spaced apart from the first semiconductor chip in a horizontal direction.
  • A capacitor is located between the connector and the first semiconductor chip.
  • The guide pattern includes two guide portions, one between the connector and the capacitor, and the other between the capacitor and the first semiconductor chip.
  • The capacitor is inserted between these two guide portions.

Potential applications of this technology:

  • Semiconductor packaging for various electronic devices such as smartphones, laptops, and IoT devices.
  • High-performance computing systems.
  • Automotive electronics.
  • Aerospace and defense systems.

Problems solved by this technology:

  • Efficient electrical connection between the first substrate and the interposer.
  • Proper positioning and alignment of the capacitor.
  • Improved thermal management and signal integrity.

Benefits of this technology:

  • Enhanced electrical performance and reliability.
  • Compact design and space-saving.
  • Improved thermal dissipation.
  • Better signal transmission and reduced noise interference.


Original Abstract Submitted

A semiconductor package may include; a first substrate, a first semiconductor chip disposed on the first substrate, an interposer disposed on the first semiconductor chip, a connecter spaced apart from the first semiconductor chip in a first horizontal direction and extending between the first substrate and the interposer, wherein the connecter directly electrically connects the first substrate and the interposer, a capacitor disposed between the connecter and the first semiconductor chip, and a guide pattern including a first guide portion and an opposing second guide portion spaced apart in the first horizontal direction, wherein the first guide portion is disposed between the connecter and the capacitor, the second guide portion is disposed between the capacitor and the first semiconductor chip, and at least part of the capacitor is inserted between the first guide portion and the second guide portion.