17726370. SEMICONDUCTOR DEVICE simplified abstract (Samsung Electronics Co., Ltd.)

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SEMICONDUCTOR DEVICE

Organization Name

Samsung Electronics Co., Ltd.

Inventor(s)

Jongmin Lee of Hwaseong-si (KR)

Hoonmin Kim of Hwaseong-si (KR)

SEMICONDUCTOR DEVICE - A simplified explanation of the abstract

This abstract first appeared for US patent application 17726370 titled 'SEMICONDUCTOR DEVICE

Simplified Explanation

The abstract describes a semiconductor device that includes lower electrodes, upper support layers, a dielectric layer, and an upper electrode. The lower electrodes are arranged in a honeycomb pattern, with the first upper support layer pattern covering the upper sidewalls of the lower electrodes. The device is designed to reduce defects caused by bending stresses.

  • Lower electrodes are arranged in a honeycomb pattern with a hexagonal shape.
  • The first upper support layer pattern covers the upper sidewalls of the lower electrodes.
  • The device includes a dielectric layer and an upper electrode on the surfaces of the lower electrodes and the first upper support layer pattern.
  • The lower electrodes are arranged in rows in two perpendicular directions.
  • Each opening in the first upper support layer pattern exposes portions of the upper sidewalls of at least four lower electrodes in two adjacent rows.
  • The device is designed to decrease defects caused by bending stresses.

Potential Applications

  • Semiconductor devices
  • Electronics manufacturing
  • Integrated circuits

Problems Solved

  • Decreasing defects caused by bending stresses in semiconductor devices

Benefits

  • Improved reliability and performance of semiconductor devices
  • Increased lifespan of electronic components
  • Enhanced manufacturing efficiency


Original Abstract Submitted

A semiconductor device may include lower electrodes on a substrate, a first upper support layer pattern on upper sidewalls of the lower electrodes, and a dielectric layer and an upper electrode on surfaces of the lower electrodes and the first upper support layer pattern. The lower electrodes may be in a honeycomb pattern with the lower electrodes are at vertexes and center of a hexagon. The first upper support layer pattern may be a first plate shape including openings exposing some of all the lower electrodes. The lower electrodes may form rows in a first direction, the rows arranged in a second direction perpendicular to the first direction. Each opening may expose portions of upper sidewalls of at least four lower electrodes in two adjacent rows. Each of the openings may have a longitudinal direction in the first direction. In semiconductor devices, defects from bending stresses may be decreased.