17725722. Forming Silicon-Containing Material Over Metal Gate To Reduce Loading Between Long Channel And Short Channel Transistors simplified abstract (TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.)

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Forming Silicon-Containing Material Over Metal Gate To Reduce Loading Between Long Channel And Short Channel Transistors

Organization Name

TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

Inventor(s)

Wei-Cheng Wang of Hsinchu (TW)

Shih-Hang Chiu of Taichung City (TW)

Kuan-Ting Liu of Hsinchu City (TW)

Cheng-Lung Hung of Hsinchu City (TW)

Chi On Chui of Hsinchu City (TW)

Forming Silicon-Containing Material Over Metal Gate To Reduce Loading Between Long Channel And Short Channel Transistors - A simplified explanation of the abstract

This abstract first appeared for US patent application 17725722 titled 'Forming Silicon-Containing Material Over Metal Gate To Reduce Loading Between Long Channel And Short Channel Transistors

Simplified Explanation

The patent application describes a semiconductor device with a metal gate electrode and various layers on top of it.

  • The device includes an active region, metal gate electrode, conductive layer, silicon-containing layer, and dielectric layer.
  • The metal gate electrode is placed over the active region.
  • The conductive layer is placed over the metal gate electrode.
  • A first portion of the conductive layer has a silicon-containing layer on top of it.
  • A second portion of the conductive layer has a dielectric layer on top of it.
  • A gate via extends vertically through the silicon-containing layer.
  • The gate via is positioned over the metal gate electrode and is electrically connected to it.

Potential applications of this technology:

  • Semiconductor manufacturing industry
  • Electronics industry
  • Integrated circuit design and production

Problems solved by this technology:

  • Improved performance and functionality of semiconductor devices
  • Enhanced electrical connectivity and integration of different layers
  • Efficient use of space within the device structure

Benefits of this technology:

  • Increased efficiency and reliability of semiconductor devices
  • Enhanced electrical performance and signal transmission
  • Compact design and improved integration capabilities


Original Abstract Submitted

A semiconductor device includes an active region. A metal gate electrode is disposed over the active region. A conductive layer is disposed over the metal gate electrode. A silicon-containing layer is disposed over a first portion of the conductive layer. A dielectric layer is disposed over a second portion of the conductive layer. A gate via vertically extends through the silicon-containing layer. The gate via is disposed over, and electrically coupled to, the metal gate electrode.