17724685. SEMICONDUCTOR DEVICE INCLUDING PERIPHERAL CONTACT simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)
Contents
SEMICONDUCTOR DEVICE INCLUDING PERIPHERAL CONTACT
Organization Name
Inventor(s)
Jinseong Lee of Gapyeong-gun (KR)
Kyounghee Kim of Hwaseong-si (KR)
SEMICONDUCTOR DEVICE INCLUDING PERIPHERAL CONTACT - A simplified explanation of the abstract
This abstract first appeared for US patent application 17724685 titled 'SEMICONDUCTOR DEVICE INCLUDING PERIPHERAL CONTACT
Simplified Explanation
The patent application describes a semiconductor device with various components and structures, including cell active patterns, cell gate structures, peripheral active patterns, peripheral gate structures, conductive patterns, capacitor structures, and interlayer insulating layers. The device also includes a peripheral contact that extends through the interlayer insulating layer.
- The interlayer insulating layer of the device consists of a first material layer in contact with the capacitor structure and a second material layer on top of the first material layer.
- The peripheral contact has two portions: a first portion that contacts the first material layer and a second portion that contacts the second material layer.
- The first portion of the peripheral contact has a maximum width that is greater than the minimum width of the second portion.
Potential applications of this technology:
- Semiconductor manufacturing industry
- Electronics industry
- Integrated circuit design and production
Problems solved by this technology:
- Efficient integration of various components and structures in a semiconductor device
- Improved electrical connectivity and contact between different layers and structures
Benefits of this technology:
- Enhanced performance and functionality of semiconductor devices
- Increased efficiency and reliability in circuit design and production
- Improved electrical connectivity and signal transmission within the device.
Original Abstract Submitted
A semiconductor device including a cell active pattern; a cell gate structure connected to the cell active pattern; a peripheral active pattern; a peripheral gate structure connected to the peripheral active pattern; a conductive pattern connected to the peripheral active pattern, the cell gate structure, or the peripheral gate structure; a capacitor structure electrically connected to the cell active pattern; an interlayer insulating layer surrounding the capacitor structure; and a peripheral contact connected to the conductive pattern while extending through the interlayer insulating layer, wherein the interlayer insulating layer includes a first material layer contacting the capacitor structure, and a second material layer on the first material layer, the peripheral contact includes a first portion contacting the first material layer, and a second portion contacting the second material layer, and a maximum width of the first portion is greater than a minimum width of the second portion.
