17717731. SEMICONDUCTOR DEVICE WITH INTEGRATED METAL-INSULATOR-METAL CAPACITORS simplified abstract (TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.)
Contents
SEMICONDUCTOR DEVICE WITH INTEGRATED METAL-INSULATOR-METAL CAPACITORS
Organization Name
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Inventor(s)
Wei-Zhong Chen of Taipei City (TW)
JeiMing Chen of Tainan City (TW)
SEMICONDUCTOR DEVICE WITH INTEGRATED METAL-INSULATOR-METAL CAPACITORS - A simplified explanation of the abstract
This abstract first appeared for US patent application 17717731 titled 'SEMICONDUCTOR DEVICE WITH INTEGRATED METAL-INSULATOR-METAL CAPACITORS
Simplified Explanation
The abstract describes a method of forming a semiconductor device by layering conductive and dielectric materials. The process involves treating a conductive layer with a plasma process before adding another conductive layer. The layered structure is then patterned to form electrodes.
- The method involves forming an interconnect structure, an etch stop layer, and a multi-layered structure.
- The multi-layered structure includes a treated conductive layer and another conductive layer.
- The layered structure is patterned to form electrodes.
- A dielectric layer is formed over the electrodes.
- Another multi-layered structure with the same layered structure is formed over the dielectric layer.
- The second multi-layered structure is patterned to form another set of electrodes.
Potential applications of this technology:
- Semiconductor devices manufacturing
- Integrated circuits production
- Electronics industry
Problems solved by this technology:
- Provides a method for forming a semiconductor device with precise layering and patterning.
- Allows for the creation of multi-layered structures with treated conductive layers.
- Enables the formation of electrodes with improved performance.
Benefits of this technology:
- Improved functionality and performance of semiconductor devices.
- Enhanced precision in layering and patterning.
- Increased efficiency in manufacturing processes.
Original Abstract Submitted
A method of forming a semiconductor device includes: forming an interconnect structure over a substrate; forming an etch stop layer over the interconnect structure; and forming a first multi-layered structure over the etch stop layer, which includes: forming a first conductive layer over the etch stop layer; treating an upper layer of the first conductive layer with a plasma process; and forming a second conductive layer over the treated first conductive layer. The method further includes: patterning the first multi-layered structure to form a first electrode; forming a first dielectric layer over the first electrode; forming a second multi-layered structure over the first dielectric layer, the second multi-layered structure having the same layered structure as the first multi-layered structure; and patterning the second multi-layered structure to form a second electrode.
