17717619. SEMICONDUCTOR PACKAGE AND METHOD FOR FABRICATING THE SAME simplified abstract (Samsung Electronics Co., Ltd.)

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SEMICONDUCTOR PACKAGE AND METHOD FOR FABRICATING THE SAME

Organization Name

Samsung Electronics Co., Ltd.

Inventor(s)

Young Hun Cheong of Seoul (KR)

Young Lyong Kim of Anyang-si (KR)

Cheol Soo Han of Hwaseong-si (KR)

SEMICONDUCTOR PACKAGE AND METHOD FOR FABRICATING THE SAME - A simplified explanation of the abstract

This abstract first appeared for US patent application 17717619 titled 'SEMICONDUCTOR PACKAGE AND METHOD FOR FABRICATING THE SAME

Simplified Explanation

The abstract describes a semiconductor package that has improved reliability. The package includes a semiconductor device with connection terminals on one surface. A protection member is placed on the surface, partially covering the side surfaces of the connection terminals while exposing their lower surfaces. A mold member is then applied, covering the side surface of the semiconductor device and a portion of the protection member, but not covering the lower surfaces of the connection terminals.

  • The semiconductor package has a plurality of connection terminals on one surface of the semiconductor device.
  • A protection member is used to partially cover the side surfaces of the connection terminals.
  • The protection member allows the lower surfaces of the connection terminals to be exposed.
  • A mold member is applied to cover the side surface of the semiconductor device and a portion of the protection member.
  • The mold member does not cover the lower surfaces of the connection terminals.

Potential Applications

  • Semiconductor manufacturing industry
  • Electronics industry
  • Integrated circuit packaging

Problems Solved

  • Improved reliability of semiconductor packages
  • Protection of connection terminals from external factors
  • Prevention of damage to lower surfaces of connection terminals during packaging

Benefits

  • Enhanced reliability of semiconductor devices
  • Increased protection for connection terminals
  • Reduced risk of damage during packaging process


Original Abstract Submitted

Provided is a semiconductor package with improved reliability. The semiconductor package includes: a plurality of connection terminals on a first surface of the semiconductor device; a protection member on the first surface of the semiconductor device and partially covers side surfaces of the plurality of connection terminals such that the protective member exposes lower surfaces of the plurality of connection terminals; and a mold member that covers a side surface of the semiconductor device and a portion of the protection member such that the mold member does not cover the lower surfaces of the plurality of connection terminals.