17714490. SEMICONDUCTOR PACKAGE INCLUDING REDISTRIBUTION STRUCTURE AND METHOD FOR MANUFACTURING THE SAME simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)

SEMICONDUCTOR PACKAGE INCLUDING REDISTRIBUTION STRUCTURE AND METHOD FOR MANUFACTURING THE SAME

Organization Name

SAMSUNG ELECTRONICS CO., LTD.

Inventor(s)

Jongyoun Kim of Seoul (KR)

Minjung Kim of Cheonan-si (KR)

Gwangjae Jeon of Hwaseong-si (KR)

SEMICONDUCTOR PACKAGE INCLUDING REDISTRIBUTION STRUCTURE AND METHOD FOR MANUFACTURING THE SAME - A simplified explanation of the abstract

This abstract first appeared for US patent application 17714490 titled 'SEMICONDUCTOR PACKAGE INCLUDING REDISTRIBUTION STRUCTURE AND METHOD FOR MANUFACTURING THE SAME

Simplified Explanation

The abstract describes a semiconductor package that includes various layers and patterns to protect and connect different components.

• The semiconductor package includes a terminal and a conductive pattern connected to the terminal.
• A barrier layer covers the top surface and a side wall of the conductive pattern.
• An insulating layer surrounds the barrier layer.
• A protection layer covers the bottom surface of the insulating layer and the barrier layer.
• A redistribution pattern is connected to the barrier layer.
• A semiconductor chip is electrically connected to the redistribution pattern.
• A molding layer surrounds the semiconductor chip.
• The top surface of the protection layer has a portion that contacts the conductive pattern and another portion that contacts the barrier layer.

Potential applications of this technology:

• Semiconductor packaging for electronic devices such as smartphones, tablets, and computers.
• Integrated circuits and microprocessors used in various industries including automotive, aerospace, and telecommunications.

Problems solved by this technology:

• Provides protection for the conductive pattern and semiconductor chip from external elements and damage.
• Ensures proper electrical connections between different components.
• Improves the reliability and performance of the semiconductor package.

Benefits of this technology:

• Enhanced durability and reliability of the semiconductor package.
• Improved electrical connectivity and signal transmission.
• Enables miniaturization and integration of electronic devices.
• Reduces the risk of damage and failure in electronic components.

Original Abstract Submitted

A semiconductor package according to the disclosure includes a terminal, a conductive pattern connected to the terminal, a barrier layer covering a top surface and a first side wall of the conductive pattern, an insulating layer surrounding the barrier layer, a protection layer covering a bottom surface of the insulating layer and a bottom surface of the barrier layer, a redistribution pattern connected to the barrier layer, a semiconductor chip electrically connected to the redistribution pattern, and a molding layer surrounding the semiconductor chip. A top surface of the protection layer includes a first portion contacting the conductive pattern, and a second portion contacting the barrier layer.