17695062. PLASMA ETCHING APPARATUS AND SEMICONDUCTOR PROCESSING SYSTEM simplified abstract (Samsung Electronics Co., Ltd.)

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PLASMA ETCHING APPARATUS AND SEMICONDUCTOR PROCESSING SYSTEM

Organization Name

Samsung Electronics Co., Ltd.

Inventor(s)

Dougyong Sung of Seoul (KR)

Youngdo Kim of Hwaseong-si (KR)

Byeongsang Kim of Hwaseong-si (KR)

Yunhwan Kim of Hwaseong-si (KR)

Jungmo Yang of Pyeongtaek-si (KR)

Sejin Oh of Hwaseong-si (KR)

Sungho Jang of Hwaseong-si (KR)

PLASMA ETCHING APPARATUS AND SEMICONDUCTOR PROCESSING SYSTEM - A simplified explanation of the abstract

This abstract first appeared for US patent application 17695062 titled 'PLASMA ETCHING APPARATUS AND SEMICONDUCTOR PROCESSING SYSTEM

Simplified Explanation

The abstract describes a plasma etching apparatus that is used for processing substrates. The apparatus includes a housing with a processing space, a support for the substrate, and electrodes for applying RF power. The apparatus also includes insulators with embedded detectors.

  • The plasma etching apparatus is designed to process substrates using a plasma etching technique.
  • The apparatus includes a housing with a processing space where the etching takes place.
  • Inside the housing, there is a support that holds the substrate during the etching process.
  • The support includes at least one lower electrode, and there is at least one upper electrode facing the lower electrode.
  • RF power is applied to the electrodes using separate power sources - a lower RF power source for the lower electrode and an upper RF power source for the upper electrode.
  • The apparatus also includes sidewall electrodes that are located on the sidewalls of the housing.
  • Insulators are placed adjacent to the electrodes - a lower insulator next to the lower electrode and an upper insulator next to the upper electrode.
  • Embedded in these insulators are detectors - lower detectors in the lower insulator and upper detectors in the upper insulator.

Potential applications of this technology:

  • Semiconductor manufacturing: The plasma etching apparatus can be used in the production of semiconductor devices, where precise etching is required.
  • Microfabrication: The apparatus can be used in the fabrication of microelectromechanical systems (MEMS) and other microdevices.
  • Nanotechnology: The plasma etching apparatus can be utilized in the production of nanoscale structures and devices.

Problems solved by this technology:

  • Precise etching: The apparatus allows for precise control of the etching process, resulting in accurate and uniform etching of the substrate.
  • Detection of process parameters: The embedded detectors provide real-time monitoring of the etching process, allowing for adjustments and optimization.
  • Sidewall etching: The sidewall electrodes enable etching of the sidewalls of the substrate, allowing for more complex etching patterns.

Benefits of this technology:

  • Improved process control: The separate RF power sources and embedded detectors enhance the control and monitoring of the etching process, leading to improved process outcomes.
  • Versatile etching capabilities: The apparatus allows for etching of various materials and complex patterns, expanding the range of applications.
  • Enhanced productivity: The precise control and monitoring capabilities of the apparatus contribute to increased productivity and yield in semiconductor and microfabrication processes.


Original Abstract Submitted

A plasma etching apparatus includes a housing having a processing space; a support inside the housing, the support configured to support a substrate and including at least one lower electrode; at least one upper electrode facing the at least one lower electrode; a sidewall electrode disposed on a sidewall of the housing; a lower radiofrequency (RF) power source connected to the at least one lower electrode and configured to apply RF power; an upper RF power source connected to the at least one upper electrode and configured to apply RF power; a lower insulator adjacent to the at least one lower electrode; an upper insulator adjacent to the at least one upper electrode; at least one lower detector embedded in the lower insulator; and at least one upper detector embedded in the upper insulator.

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