17685738. FORMATION METHOD OF SEMICONDUCTOR DEVICE WITH DIELECTRIC ISOLATION STRUCTURE simplified abstract (TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.)

FORMATION METHOD OF SEMICONDUCTOR DEVICE WITH DIELECTRIC ISOLATION STRUCTURE

Organization Name

TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

Inventor(s)

Wan-Yi Kao of Baoshan Township (TW)

Che-Hao Chang of Hsinchu City (TW)

Yung-Cheng Lu of Hsinchu City (TW)

Chi On Chui of Hsinchu City (TW)

FORMATION METHOD OF SEMICONDUCTOR DEVICE WITH DIELECTRIC ISOLATION STRUCTURE - A simplified explanation of the abstract

This abstract first appeared for US patent application 17685738 titled 'FORMATION METHOD OF SEMICONDUCTOR DEVICE WITH DIELECTRIC ISOLATION STRUCTURE

Simplified Explanation

The abstract describes a method for forming a semiconductor device. Here are the key points:

• The method involves creating a semiconductor protruding structure on a substrate.
• An insulating layer is then formed around the semiconductor protruding structure.
• A dielectric layer is added on top of the insulating layer.
• The dielectric layer and insulating layer are partially removed using a planarization process, resulting in a level surface.
• A protective layer is applied to cover the topmost surfaces of the dielectric layer.
• The insulating layer is recessed, leaving the semiconductor protruding structure and a portion of the dielectric layer protruding from the remaining insulating layer.

Potential applications of this technology:

• Semiconductor devices, such as transistors, integrated circuits, or memory chips, can benefit from this method of forming.
• The method can be used in the manufacturing of various electronic devices, including smartphones, computers, and other consumer electronics.

Problems solved by this technology:

• The method allows for the creation of a level surface, ensuring that the topmost surfaces of the semiconductor protruding structure, insulating layer, and dielectric layer are aligned.
• The planarization process helps to remove any unevenness or roughness, improving the overall quality and performance of the semiconductor device.

Benefits of this technology:

• By achieving a level surface, the method enhances the reliability and functionality of the semiconductor device.
• The protective layer provides additional protection to the dielectric layer, preventing damage or contamination.
• The recessed insulating layer allows for better integration and connection with other components in the semiconductor device.

Original Abstract Submitted

A method for forming a semiconductor device is provided. The method includes forming a semiconductor protruding structure over a substrate and surrounding the semiconductor protruding structure with an insulating layer. The method also includes forming a dielectric layer over the insulating layer. The method further includes partially removing the dielectric layer and insulating layer using a planarization process. As a result, topmost surfaces of the semiconductor protruding structure, the insulating layer, and the dielectric layer are substantially level with each other. In addition, the method includes forming a protective layer to cover the topmost surfaces of the dielectric layer. The method includes recessing the insulating layer after the protective layer is formed such that the semiconductor protruding structure and a portion of the dielectric layer protrude from a top surface of a remaining portion of the insulating layer.