17680507. SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)
SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME
Organization Name
Inventor(s)
WANDON Kim of Seongnam-si (KR)
SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME - A simplified explanation of the abstract
This abstract first appeared for US patent application 17680507 titled 'SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME
Simplified Explanation
The patent application describes a semiconductor device and a method of fabricating it. The device consists of multiple individual devices on a substrate, with three metal layers stacked on top. The second metal layer includes an interlayer insulating layer and an interconnection line. The interconnection line has a lower via portion connected to the first metal layer, an upper via portion connected to the third metal layer, and a line portion between them. The line width of the upper portion gradually decreases away from the substrate, while the line width of the lower portion gradually increases away from the substrate.
- The patent application describes a semiconductor device with a unique interconnection line design.
- The interconnection line has a lower via portion connected to the first metal layer and an upper via portion connected to the third metal layer.
- The line width of the upper portion gradually decreases away from the substrate, while the line width of the lower portion gradually increases away from the substrate.
Potential Applications
This technology can be applied in various semiconductor devices, such as integrated circuits and microprocessors.
Problems Solved
The interconnection line design solves the problem of efficiently connecting different metal layers in a semiconductor device.
Benefits
The design allows for improved electrical connectivity between metal layers. The gradual change in line width helps to reduce signal loss and improve overall performance. The method of fabricating the device provides a simplified and efficient process.
Original Abstract Submitted
Disclosed are a semiconductor device and a method of fabricating the same. The device includes an FEOL layer, which includes a plurality of individual devices, on a substrate, and first, second, and third metal layers sequentially stacked on the FEOL layer. The second metal layer includes an interlayer insulating layer and an interconnection line in the interlayer insulating layer. The interconnection line includes a lower via portion electrically connected to the first metal layer, an upper via portion electrically connected to the third metal layer, and a line portion between the lower via portion and the upper via portion. A line width of an upper portion of the interconnection line gradually decreases in a vertical direction away from the substrate, and a line width of a lower portion of the interconnection line gradually increases in a vertical direction away from the substrate.
