17679234. INTERCONNECTION STRUCTURE AND METHODS OF FORMING THE SAME simplified abstract (Taiwan Semiconductor Manufacturing Co., Ltd.)
Contents
INTERCONNECTION STRUCTURE AND METHODS OF FORMING THE SAME
Organization Name
Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor(s)
Chin-Lung Chung of Taoyuan City (TW)
Ching-Fu Yeh of Hsinchu City (TW)
Shin-Yi Yang of New Taipei City (TW)
INTERCONNECTION STRUCTURE AND METHODS OF FORMING THE SAME - A simplified explanation of the abstract
This abstract first appeared for US patent application 17679234 titled 'INTERCONNECTION STRUCTURE AND METHODS OF FORMING THE SAME
Simplified Explanation
The patent application describes an interconnection structure for electronic devices. Here are the key points:
- The structure includes a conductive feature, a first etch stop layer, and a second dielectric material.
- A conductive via extends through the second dielectric material and the first etch stop layer, making contact with the conductive feature.
- A first barrier layer and a first liner are placed between the second dielectric material and the conductive via.
- A third dielectric material is placed over the second dielectric material, and a conductive line is embedded in it, directly contacting the conductive via.
- A second barrier layer and a second liner are placed on the second dielectric material, making contact with the first barrier layer and the conductive line.
- The second liner is separated from the first liner.
Potential applications of this technology:
- Integrated circuits
- Microprocessors
- Memory devices
- Communication devices
Problems solved by this technology:
- Improved interconnection structure for electronic devices
- Enhanced electrical conductivity and signal transmission
- Reduced resistance and capacitance
Benefits of this technology:
- Higher performance and reliability of electronic devices
- Improved speed and efficiency of data transfer
- Enhanced functionality and miniaturization of electronic components
Original Abstract Submitted
An interconnection structure includes a conductive feature disposed in a first dielectric material, a first etch stop layer disposed over the first dielectric material, a second dielectric material disposed on the first etch stop layer, a conductive via extending through the second dielectric material and the first etch stop layer and in contact with at least a portion of the conductive feature, a first barrier layer disposed between the second dielectric material and the conductive via, a first liner disposed between and in contact with the first barrier layer and the conductive via, a third dielectric material disposed over the second dielectric material, a conductive line disposed in the third dielectric material and in direct contact with the conductive via, a second barrier layer disposed on the second dielectric material and in contact with the first barrier layer and the conductive line, and a second liner disposed between and in contact with the second barrier layer and the conductive line, wherein the second liner is separated from the first liner.
