17666212. NEAR MEMORY PROCESSING (NMP) DUAL IN-LINE MEMORY MODULE (DIMM) simplified abstract (Samsung Electronics Co., Ltd.)
NEAR MEMORY PROCESSING (NMP) DUAL IN-LINE MEMORY MODULE (DIMM)
Organization Name
Inventor(s)
ELDHO MATHEW Pathiyakkara Thombra of KARNATAKA (IN)
RAVI SHANKAR VENKATA Jonnalagadda of KARNATAKA (IN)
PRASHANT VISHWANATH Mahendrakar of KARNATAKA (IN)
VISHNU CHARAN Thummala of KARNATAKA (IN)
NEAR MEMORY PROCESSING (NMP) DUAL IN-LINE MEMORY MODULE (DIMM) - A simplified explanation of the abstract
This abstract first appeared for US patent application 17666212 titled 'NEAR MEMORY PROCESSING (NMP) DUAL IN-LINE MEMORY MODULE (DIMM)
Simplified Explanation
The abstract describes a patent application for a Near Memory Processing (NMP) Dual In-line Memory Module (DIMM). This module includes random access memory (RAM), a Near-Memory-Processing (NMP) circuit, and a control port.
- The NMP circuit receives commands from a host system.
- The NMP circuit determines the operation to be performed on the RAM based on the received command.
- The NMP circuit also determines the location of data within the RAM for the determined operation.
- The first control port interacts with a second control port of the host system.
- This interaction enables the NMP circuit to exchange control information with the host system in response to the received command.
Potential Applications
- High-performance computing systems
- Data centers
- Artificial intelligence and machine learning applications
- Real-time processing systems
Problems Solved
- Improved memory processing capabilities
- Enhanced data access and manipulation efficiency
- Reduced latency in data processing
- Increased overall system performance
Benefits
- Faster and more efficient data processing
- Improved system performance and responsiveness
- Reduced data transfer and communication overhead
- Enhanced capabilities for memory-intensive applications
Original Abstract Submitted
A Near Memory Processing (NMP) Dual In-line Memory Module (DIMM) is provided that includes random access memory (RAM), a Near-Memory-Processing (NMP) circuit and a first control port. The NMP circuit is for receiving a command from a host system, determining an operation to be performed on the RAM in response to the command, and a location of data within the RAM with respect to the determined operation. The first control port interacts with a second control port of the host system to enable the NMP circuit to exchange control information with the host system in response to the received command.
