17656011. SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME simplified abstract (SAMSUNG ELECTRONICS CO.,LTD.)

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SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME

Organization Name

SAMSUNG ELECTRONICS CO.,LTD.

Inventor(s)

Juhyeon Kim of Cheonan-si (KR)

Hyoeun Kim of Cheonan-si (KR)

Sunkyoung Seo of Cheonan-si (KR)

SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME - A simplified explanation of the abstract

This abstract first appeared for US patent application 17656011 titled 'SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME

Simplified Explanation

The patent application describes a method of manufacturing a semiconductor package. Here are the key points:

  • The method involves preparing a wafer structure with a first semiconductor substrate and multiple first front surface connection pads.
  • A lower semiconductor chip with a preliminary semiconductor substrate and multiple second front surface connection pads is attached to the wafer structure, aligning the first and second front surface connection pads.
  • Bonding pads are formed by bonding the corresponding first and second front surface connection pads together.
  • A second semiconductor substrate is formed by removing a portion of the preliminary semiconductor substrate, resulting in a narrower width compared to the second wiring structure.

Potential applications of this technology:

  • Semiconductor packaging industry
  • Electronics manufacturing

Problems solved by this technology:

  • Simplifies the manufacturing process of semiconductor packages
  • Provides a method for aligning and bonding front surface connection pads

Benefits of this technology:

  • Streamlines the manufacturing process, reducing time and cost
  • Improves the efficiency and reliability of semiconductor packages.


Original Abstract Submitted

A method of manufacturing a semiconductor package includes preparing a wafer structure having a first semiconductor substrate and a plurality of first front surface connection pads. A lower semiconductor chip having a preliminary semiconductor substrate and a plurality of second front surface connection pads are attached to the wafer structure such that the plurality of first front surface connection pads and the plurality of second front surface connection pads correspond to each other. A plurality of bonding pads is formed by bonding together the plurality of first front surface connection pads and the plurality of second front surface connection pads corresponding to each other. A second semiconductor substrate having a horizontal width that is less than that of the second wiring structure is formed by removing a portion of the preliminary semiconductor substrate.