17643434. TOP VIA INTERCONNECT STRUCTURE WITH TEXTURE SUPPRESSION LAYERS simplified abstract (INTERNATIONAL BUSINESS MACHINES CORPORATION)

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TOP VIA INTERCONNECT STRUCTURE WITH TEXTURE SUPPRESSION LAYERS

Organization Name

INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor(s)

Oscar Van Der Straten of Guilderland Center NY (US)

Koichi Motoyama of Clifton Park NY (US)

Joseph F. Maniscalco of Greenville SC (US)

Kenneth Chun Kuen Cheng of Shatin (HK)

TOP VIA INTERCONNECT STRUCTURE WITH TEXTURE SUPPRESSION LAYERS - A simplified explanation of the abstract

This abstract first appeared for US patent application 17643434 titled 'TOP VIA INTERCONNECT STRUCTURE WITH TEXTURE SUPPRESSION LAYERS

Simplified Explanation

The patent application describes an interconnect structure and a method for forming it. The structure consists of a metal line layer and a top via layer, both made up of alternating layers of different metals. The second layers of metal are thinner than the first layers.

  • The interconnect structure includes alternating layers of two different metals.
  • The second layers of metal are thinner than the first layers.
  • The structure is formed using a specific method.
  • The metal line layer and top via layer are part of the interconnect structure.

Potential Applications

This technology could be applied in various fields where interconnect structures are needed, such as:

  • Integrated circuits
  • Microprocessors
  • Semiconductor devices
  • Electronic components

Problems Solved

The interconnect structure and method described in the patent application address the following problems:

  • Improving the performance and reliability of interconnects.
  • Reducing resistance and capacitance in interconnects.
  • Enhancing the overall efficiency of electronic devices.

Benefits

The use of this interconnect structure and method offers several benefits:

  • Improved electrical conductivity.
  • Enhanced signal transmission.
  • Increased durability and reliability of interconnects.
  • Higher performance and efficiency of electronic devices.


Original Abstract Submitted

An interconnect structure and a method of forming the interconnect structure are provided. The interconnect structure includes a metal line layer and a top via layer that each include a plurality of alternating first layers composed of a first metal and second layers composed of a second metal, whereby the second layers are thinner than the first layers.