17589575. METHOD OF OVERLAY MEASUREMENT simplified abstract (TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.)

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METHOD OF OVERLAY MEASUREMENT

Organization Name

TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

Inventor(s)

Shih-Yu Chang of Yunlin County (TW)

Chien-Han Chen of Nantou County (TW)

Chien-Chih Chiu of Tainan City (TW)

Chi-Che Tseng of Taoyuan City (TW)

METHOD OF OVERLAY MEASUREMENT - A simplified explanation of the abstract

This abstract first appeared for US patent application 17589575 titled 'METHOD OF OVERLAY MEASUREMENT

Simplified Explanation

The patent application describes a method for depositing a layer of inter-metal dielectric (IMD) over a conductive line in a semiconductor device. The method involves forming a via opening directly over the conductive line, with the width of the conductive line being larger than the width of the via opening. An overlay measurement is then performed using a backscattered electron image to determine the alignment between the via opening and the conductive line.

  • The method involves depositing an IMD layer over a conductive line in a semiconductor device.
  • A via opening is formed directly over the conductive line.
  • The width of the conductive line is larger than the width of the via opening.
  • An overlay measurement is performed using a backscattered electron image.
  • The overlay measurement determines the alignment between the via opening and the conductive line.

Potential Applications

  • This technology can be applied in the manufacturing of semiconductor devices.
  • It can be used in the fabrication of integrated circuits and other electronic components.

Problems Solved

  • The method solves the problem of accurately aligning via openings with conductive lines in semiconductor devices.
  • It provides a reliable and efficient way to measure the overlay between the via opening and the conductive line.

Benefits

  • The method allows for precise alignment of via openings, ensuring proper electrical connections in semiconductor devices.
  • It improves the overall quality and performance of integrated circuits and electronic components.
  • The use of backscattered electron imaging provides a reliable and accurate measurement technique.


Original Abstract Submitted

A method includes depositing an inter-metal dielectric (IMD) layer over a conductive line. A via opening is formed in the IMD layer and directly over the conductive line. A width of the conductive line is greater than a width of the via opening. An overlay measurement is performed. The overlay measurement includes obtaining a backscattered electron image of the via opening and the conductive line and determining an overlay between the via opening and the conductive line according to the backscattered electron image.