17586770. LOW-LATENCY INPUT DATA STAGING TO EXECUTE KERNELS simplified abstract (Samsung Electronics Co., Ltd.)
Contents
- 1 LOW-LATENCY INPUT DATA STAGING TO EXECUTE KERNELS
- 1.1 Organization Name
- 1.2 Inventor(s)
- 1.3 LOW-LATENCY INPUT DATA STAGING TO EXECUTE KERNELS - A simplified explanation of the abstract
- 1.4 Simplified Explanation
- 1.5 Abstract
- 1.6 Patent/Innovation Explanation
- 1.7 Potential Applications
- 1.8 Problems Solved
- 1.9 Benefits
- 1.10 Original Abstract Submitted
LOW-LATENCY INPUT DATA STAGING TO EXECUTE KERNELS
Organization Name
Inventor(s)
Marie Mai Nguyen of Pittsburgh PA (US)
Rekha Pitchumani of Oak Hill VA (US)
Yang Seok Ki of Palo Alto CA (US)
Krishna Teja Malladi of San Jose CA (US)
LOW-LATENCY INPUT DATA STAGING TO EXECUTE KERNELS - A simplified explanation of the abstract
This abstract first appeared for US patent application 17586770 titled 'LOW-LATENCY INPUT DATA STAGING TO EXECUTE KERNELS
Simplified Explanation
Abstract
An accelerator is described in this patent application. The accelerator utilizes a tier storage system to store data and a circuit to process the data and produce processed data. The data is loaded from a device using a cache-coherent interconnect protocol.
Patent/Innovation Explanation
- The patent describes an accelerator that enhances data processing capabilities.
- The accelerator utilizes a tier storage system to efficiently store data.
- A circuit is employed to process the data and generate processed data.
- The data is loaded from a device using a cache-coherent interconnect protocol, ensuring efficient and synchronized data transfer.
Potential Applications
This technology has potential applications in various fields, including:
- Data centers and cloud computing: The accelerator can improve data processing speed and efficiency in large-scale data centers and cloud computing environments.
- Artificial intelligence and machine learning: The accelerator can enhance the performance of AI and ML algorithms by accelerating data processing.
- High-performance computing: The technology can be utilized in supercomputers and scientific research to optimize data processing capabilities.
Problems Solved
The technology addresses several problems in data processing:
- Slow data processing: The accelerator improves data processing speed, reducing processing time and increasing overall efficiency.
- Data storage limitations: The tier storage system allows for efficient and scalable data storage, overcoming limitations of traditional storage methods.
- Data transfer bottlenecks: The cache-coherent interconnect protocol ensures synchronized and fast data transfer, eliminating bottlenecks in data loading.
Benefits
The technology offers several benefits:
- Improved data processing speed: The accelerator significantly enhances data processing capabilities, leading to faster and more efficient operations.
- Scalable data storage: The tier storage system allows for flexible and scalable data storage, accommodating large amounts of data.
- Enhanced data transfer efficiency: The cache-coherent interconnect protocol ensures fast and synchronized data transfer, optimizing overall system performance.
Original Abstract Submitted
An accelerator is disclosed. A tier storage may store data. A circuit may process the data to produce a processed data. The accelerator may load the data from a device using a cache-coherent interconnect protocol.
