17585942. METHODS AND SYSTEMS FOR INTEGRATED CIRCUIT PHOTOMASK PATTERNING simplified abstract (TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.)
METHODS AND SYSTEMS FOR INTEGRATED CIRCUIT PHOTOMASK PATTERNING
Organization Name
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Inventor(s)
Wei-Hao Huang of Taichung (TW)
METHODS AND SYSTEMS FOR INTEGRATED CIRCUIT PHOTOMASK PATTERNING - A simplified explanation of the abstract
This abstract first appeared for US patent application 17585942 titled 'METHODS AND SYSTEMS FOR INTEGRATED CIRCUIT PHOTOMASK PATTERNING
Simplified Explanation
The patent application describes methods and systems for patterning photomasks used in integrated circuit (IC) manufacturing. The methods involve inserting a dummy region in the IC design layout, which is separated from the active region by a certain distance. Various operations are performed on the layout to reduce the distance between the active and dummy regions. Then, a dummy region size reduction is performed to increase the distance to a value greater than the minimum feature size to be patterned by a photolithography tool. Finally, a photomask is formed using the modified IC design layout.
- The method involves inserting a dummy region in an IC design layout.
- The dummy region is initially separated from the active region by a certain distance.
- Various operations are performed on the layout to reduce the distance between the active and dummy regions.
- A dummy region size reduction is performed to increase the distance to a value greater than the minimum feature size to be patterned.
- A photomask is formed using the modified IC design layout.
Potential Applications
- This technology can be applied in the manufacturing of integrated circuits.
- It can be used to improve the accuracy and precision of photomask patterning.
Problems Solved
- The technology solves the problem of reducing the distance between active and dummy regions in IC design layouts.
- It addresses the challenge of increasing the distance between active and dummy regions to meet the requirements of photolithography tools.
Benefits
- The method allows for more precise and accurate patterning of photomasks.
- It improves the overall quality and performance of integrated circuits.
- The technology can potentially reduce manufacturing defects and improve yield rates.
Original Abstract Submitted
Methods and systems for IC photomask patterning are described. In some embodiments, a method includes inserting a dummy region in an IC design layout, the IC design layout includes an active region, and the active region and the dummy region is separated by a first distance. The method further includes performing one or more operations on the IC design layout, and the active region and the dummy region is separated by a second distance substantially less than the first distance. The method further includes performing a dummy region size reduction on the IC design layout to increase the second distance to a third distance substantially greater than the second distance, and the third distance is substantially greater than a minimum feature size to be patterned by a photolithography tool. The method further includes forming a photomask using the IC design layout.
