17577040. MEMORY DEVICES, CIRCUITS AND METHODS OF ADJUSTING A SENSING CURRENT FOR THE MEMORY DEVICE simplified abstract (TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.)

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MEMORY DEVICES, CIRCUITS AND METHODS OF ADJUSTING A SENSING CURRENT FOR THE MEMORY DEVICE

Organization Name

TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

Inventor(s)

Win-San Khwa of Taipei city (TW)

Jui-Jen Wu of Hsinchu (TW)

Jen-Chieh Liu of Hsinchu (TW)

Meng-Fan Chang of Taichung City (TW)

MEMORY DEVICES, CIRCUITS AND METHODS OF ADJUSTING A SENSING CURRENT FOR THE MEMORY DEVICE - A simplified explanation of the abstract

This abstract first appeared for US patent application 17577040 titled 'MEMORY DEVICES, CIRCUITS AND METHODS OF ADJUSTING A SENSING CURRENT FOR THE MEMORY DEVICE

Simplified Explanation

The patent application describes a circuit that includes a sense amplifier, clamping circuits, and a feedback circuit. The clamping circuits are connected between the sense amplifier and a memory array or a reference array. The feedback circuit can enable or disable specific clamping branches based on the output data from the sense amplifier.

  • The circuit includes a sense amplifier, clamping circuits, and a feedback circuit.
  • The clamping circuits are connected between the sense amplifier and a memory array or a reference array.
  • The feedback circuit can selectively enable or disable specific clamping branches based on the output data from the sense amplifier.

Potential Applications

  • Memory systems
  • Data storage devices
  • Integrated circuits

Problems Solved

  • Improves the performance and reliability of memory systems
  • Reduces power consumption and noise in data storage devices
  • Enhances the functionality and efficiency of integrated circuits

Benefits

  • Improved performance and reliability of memory systems
  • Reduced power consumption and noise in data storage devices
  • Enhanced functionality and efficiency of integrated circuits


Original Abstract Submitted

A circuit includes a sense amplifier, a first clamping circuit, a second clamping circuit, and a feedback circuit. The first clamping circuit includes first clamping branches coupled in parallel between the sense amplifier and a memory array. The second clamping circuit includes second clamping branches coupled in parallel between the sense amplifier and a reference array. The feedback circuit is configured to selectively enable or disable one or more of the first clamping branches or one or more of the second clamping branches in response to an output data outputted by the sense amplifier.