17575124. SEMICONDUCTOR STRUCTURES AND METHODS FOR MANUFACTURING THE SAME simplified abstract (TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.)

SEMICONDUCTOR STRUCTURES AND METHODS FOR MANUFACTURING THE SAME

Organization Name

TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

Inventor(s)

Chih-Pin Chiu of Hsinchu (TW)

Liang-Wei Wang of Hsinchu City (TW)

Chen-Chiu Huang of Taichung City (TW)

Dian-Hau Chen of Hsinchu (TW)

SEMICONDUCTOR STRUCTURES AND METHODS FOR MANUFACTURING THE SAME - A simplified explanation of the abstract

This abstract first appeared for US patent application 17575124 titled 'SEMICONDUCTOR STRUCTURES AND METHODS FOR MANUFACTURING THE SAME

Simplified Explanation

The disclosed semiconductor device manufacturing processes aim to improve the flatness of a passivation layer deposited above a redistribution layer (RDL). This is achieved by depositing a thicker passivation layer and performing a chemical mechanical planarization (CMP) process to smooth its top surface.

• Thicker passivation layer: Instead of using a thin passivation layer, a thicker one is deposited to minimize gap formation over the etched portions of the RDL.
• Chemical mechanical planarization (CMP): After depositing the thicker passivation layer, a CMP process is performed to further smooth its top surface, reducing stress concentration areas.

Potential applications of this technology:

• Semiconductor device manufacturing: This innovation can be applied in the manufacturing processes of semiconductor devices to improve their overall pass rates.

Problems solved by this technology:

• Uneven passivation layer surface: The large gaps that typically form over the etched portions of the RDL can result in an uneven top surface of the passivation layer. This can lead to stress concentration areas and cracking of the underlying metal-insulator-metal (MIM) capacitor.

Benefits of this technology:

• Improved flatness: By depositing a thicker passivation layer and performing a CMP process, the top surface of the passivation layer becomes smoother, reducing stress concentration areas and the risk of cracking the underlying MIM capacitor.
• Enhanced pass rates: The reduction in stress and cracking of the MIM capacitor improves the overall pass rates of semiconductor devices manufactured using this process.

Original Abstract Submitted

Disclosed semiconductor device manufacturing processes improve the flatness of a passivation layer deposited above a redistribution layer (RDL). When a thin passivation layer is deposited above the RDL, its top surface tends to become very uneven due to the large gaps that typically form over the etched portions of the RDL, particularly when the RDL is disposed over an underlying super high density metal-insulator-metal (MIM) capacitor. In order to reduce the incidence of stress concentration areas on the uneven surface, a thicker passivation layer is instead deposited to minimize gap formation therein, and a chemical mechanical planarization (CMP) process is then performed to further smooth the top surface thereof. Reduction of the stress in this manner reduces the incidence of cracking of the underlying MIM, which improves the overall pass rates of semiconductor devices so manufactured.