17574043. INTEGRATED CIRCUIT DEVICES INCLUDING STACKED TRANSISTORS AND METHODS OF FORMING THE SAME simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)

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INTEGRATED CIRCUIT DEVICES INCLUDING STACKED TRANSISTORS AND METHODS OF FORMING THE SAME

Organization Name

SAMSUNG ELECTRONICS CO., LTD.

Inventor(s)

JEONGHYUK Yim of Halfmoon NY (US)

KANG-ILL Seo of Springfield VA (US)

INTEGRATED CIRCUIT DEVICES INCLUDING STACKED TRANSISTORS AND METHODS OF FORMING THE SAME - A simplified explanation of the abstract

This abstract first appeared for US patent application 17574043 titled 'INTEGRATED CIRCUIT DEVICES INCLUDING STACKED TRANSISTORS AND METHODS OF FORMING THE SAME

Simplified Explanation

The patent application describes a stacked structure for integrated circuit devices, which includes an upper transistor and a lower transistor.

  • The upper transistor consists of an upper gate electrode, an upper active region, and an upper gate insulator.
  • The upper active region is composed of an inner layer made of a first semiconductor material and an outer layer made of a second semiconductor material different from the first material.
  • The lower transistor consists of a lower gate electrode, a lower active region, and a lower gate insulator.

Potential applications of this technology:

  • Integrated circuit devices in various electronic devices such as smartphones, computers, and IoT devices.
  • High-performance computing systems that require efficient and compact circuitry.

Problems solved by this technology:

  • Improved performance and functionality of integrated circuit devices.
  • Enhanced integration density by utilizing a stacked structure.

Benefits of this technology:

  • Increased speed and efficiency of integrated circuit devices.
  • Higher integration density, allowing for more complex circuitry in a smaller footprint.
  • Improved overall performance and functionality of electronic devices.


Original Abstract Submitted

Integrated circuit devices may include a stacked structure including an upper transistor on a substrate and a lower transistor between the substrate and the upper transistor. The upper transistor may include an upper gate electrode, an upper active region in the upper gate electrode, and an upper gate insulator between the upper gate electrode and the upper active region. The upper active region may include an inner layer including a first semiconductor material and an outer layer that extends between the inner layer and the upper gate insulator and includes a second semiconductor material that is different from the first semiconductor material. The lower transistor may include a lower gate electrode, a lower active region in the lower gate electrode, and a lower gate insulator between the lower gate electrode and the lower active region.