17551950. VERTICAL FIELD EFFECT TRANSISTOR WITH MINIMAL CONTACT TO GATE EROSION simplified abstract (INTERNATIONAL BUSINESS MACHINES CORPORATION)
VERTICAL FIELD EFFECT TRANSISTOR WITH MINIMAL CONTACT TO GATE EROSION
Organization Name
INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventor(s)
Christopher J. Waskiewicz of Rexford NY (US)
Yann Mignot of Slingerlands NY (US)
Jeffrey C. Shearer of Albany NY (US)
Hemanth Jagannathan of Niskayuna NY (US)
VERTICAL FIELD EFFECT TRANSISTOR WITH MINIMAL CONTACT TO GATE EROSION - A simplified explanation of the abstract
This abstract first appeared for US patent application 17551950 titled 'VERTICAL FIELD EFFECT TRANSISTOR WITH MINIMAL CONTACT TO GATE EROSION
Simplified Explanation
Abstract
A semiconductor device has been developed that includes a substrate with a vertical fin, source/drain regions, a metal gate structure, a contact, and contact spacers.
- The device has a substrate with a vertical fin that extends from it.
- There is a bottom source/drain region located beneath the vertical fin.
- A top source/drain region is positioned above the vertical fin.
- A metal gate structure is present in the device.
- A contact is connected to the top source/drain region.
- First and second contact spacers are placed on each side of the contact.
Potential Applications
This technology can be applied in various semiconductor devices, including:
- Integrated circuits
- Transistors
- Microprocessors
- Memory devices
Problems Solved
The semiconductor device addresses the following problems:
- Efficiently controlling the flow of electrical current in a semiconductor device.
- Enhancing the performance and functionality of integrated circuits.
- Improving the speed and power efficiency of transistors.
- Increasing the storage capacity and data processing capabilities of memory devices.
Benefits
The benefits of this semiconductor device are:
- Improved control and regulation of electrical current.
- Enhanced performance and functionality of integrated circuits.
- Increased speed and power efficiency of transistors.
- Expanded storage capacity and improved data processing capabilities of memory devices.
Original Abstract Submitted
A semiconductor device comprises a substrate including at least one vertical fin extending from the substrate, a bottom source/drain region beneath the at least one vertical fin, a top source/drain region disposed above the at least one vertical fin, a metal gate structure, a contact coupled to the top source/drain region and first and second contact spacers disposed on each side of the contact.