17551686. SELF-ALIGNED GATE CONTACT FOR VTFETS simplified abstract (INTERNATIONAL BUSINESS MACHINES CORPORATION)
Contents
SELF-ALIGNED GATE CONTACT FOR VTFETS
Organization Name
INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventor(s)
Kangguo Cheng of Schenectady NY (US)
Miaomiao Wang of Albany NY (US)
SELF-ALIGNED GATE CONTACT FOR VTFETS - A simplified explanation of the abstract
This abstract first appeared for US patent application 17551686 titled 'SELF-ALIGNED GATE CONTACT FOR VTFETS
Simplified Explanation
The patent application describes a method for forming semiconductor devices by replacing dummy gate spacers with sacrificial spacers and then replacing the dummy gate with a conductor. Here are the bullet points explaining the patent/innovation:
- Formation of dummy gate spacers in a trench in a semiconductor substrate.
- Formation of a dummy gate in the trench.
- Replacement of exposed dummy gate spacer with a sacrificial spacer.
- Formation of a cap layer over the dummy gate.
- Etching of the cap layer to expose the dummy gate.
- Replacement of the sacrificial spacer with an isolation dielectric spacer.
- Replacement of the dummy gate with a conductor.
Potential applications of this technology:
- Manufacturing of advanced semiconductor devices.
- Fabrication of high-performance transistors.
- Integration into various electronic devices such as smartphones, computers, and IoT devices.
Problems solved by this technology:
- Enables the formation of more precise and efficient semiconductor devices.
- Improves the performance and functionality of electronic devices.
- Enhances the miniaturization and integration of components.
Benefits of this technology:
- Enables the production of smaller and more powerful semiconductor devices.
- Enhances the overall performance and efficiency of electronic devices.
- Facilitates the development of advanced technologies and applications.
Original Abstract Submitted
Semiconductor devices and methods of forming the same include forming dummy gate spacers in a trench in a semiconductor substrate. A dummy gate is formed in the trench. An exposed dummy gate spacer is replaced with a sacrificial spacer. A cap layer is formed over the dummy gate. The cap layer is etched to expose the dummy gate. The sacrificial spacer is replaced with an isolation dielectric spacer. The dummy gate is replaced with a conductor.
