17551457. MEMORY CELL IN WAFER BACKSIDE simplified abstract (INTERNATIONAL BUSINESS MACHINES CORPORATION)

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MEMORY CELL IN WAFER BACKSIDE

Organization Name

INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor(s)

Biswanath Senapati of Mechanicville NY (US)

Seiji Munetoh of Kawasaki (JP)

Nicholas Anthony Lanzillo of Wynantskill NY (US)

Lawrence A. Clevenger of Saratoga Springs NY (US)

Geoffrey Burr of Cupertino CA (US)

Kohji Hosokawa of Ohtsu-shi (JP)

MEMORY CELL IN WAFER BACKSIDE - A simplified explanation of the abstract

This abstract first appeared for US patent application 17551457 titled 'MEMORY CELL IN WAFER BACKSIDE

Simplified Explanation

The abstract describes a memory cell and methods of forming it on the backside of a wafer. The memory cell is connected to a buried metal structure that is formed through the frontside of the substrate. A through silicon via (TSV) is formed through the backside of the substrate and connected to the buried metal structure.

  • A memory cell is formed on the backside of a wafer.
  • A buried metal structure is formed through the frontside of the substrate.
  • At least one device is formed on the frontside of the substrate and connected to the buried metal structure.
  • A through silicon via (TSV) is formed through the backside of the substrate.
  • The TSV is connected to the buried metal structure.
  • The memory cell is connected to the TSV.

Potential Applications

  • Memory cells can be used in various electronic devices such as computers, smartphones, and tablets.
  • This technology can be applied in the development of high-density memory chips for data storage.

Problems Solved

  • This technology solves the problem of connecting memory cells to buried metal structures and through silicon vias in a wafer.
  • It provides a method for forming memory cells on the backside of a wafer, which can help optimize space utilization and improve overall performance.

Benefits

  • The use of buried metal structures and through silicon vias allows for efficient connectivity between memory cells and other devices on the wafer.
  • Forming memory cells on the backside of the wafer can help reduce the footprint and improve the integration of memory in electronic devices.
  • This technology enables the development of high-density memory chips, which can increase storage capacity and enhance device performance.


Original Abstract Submitted

A memory cell in a backside of a wafer and methods of forming the memory cell are described. A buried metal structure can be formed through a frontside of a substrate. At least one device can be formed on the frontside of a substrate, where the at least one device can be connected to the buried metal structure in the substrate. A through silicon via (TSV) can be formed through a backside of the substrate, where the TSV can be connected to the buried metal structure. A memory cell can be formed on the backside of the substrate, where the memory cell can be connected to the TSV.