17551402. FORMING NS GATES WITH IMPROVED MECHANICAL STABILITY simplified abstract (INTERNATIONAL BUSINESS MACHINES CORPORATION)

From WikiPatents
Jump to navigation Jump to search

FORMING NS GATES WITH IMPROVED MECHANICAL STABILITY

Organization Name

INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor(s)

Ruilong Xie of Niskayuna NY (US)

Julien Frougier of Albany NY (US)

Nicolas Loubet of GUILDERLAND NY (US)

Lawrence A. Clevenger of Saratoga Springs NY (US)

PRASAD Bhosale of Albany NY (US)

FORMING NS GATES WITH IMPROVED MECHANICAL STABILITY - A simplified explanation of the abstract

This abstract first appeared for US patent application 17551402 titled 'FORMING NS GATES WITH IMPROVED MECHANICAL STABILITY

Simplified Explanation

The patent application describes a semiconductor device with two gate stacks, where the first gate stack is taller than the second gate stack. The second gate stack is formed over a non-active region and includes multiple gates. The device also includes nanosheet stacks with first and second inner spacers, which are vertically aligned and directly contact the lower sidewalls of a source/drain epitaxial region to isolate the second gate stack from the shallow trench isolation (STI) region.

  • The semiconductor device has two gate stacks, with the first stack taller than the second stack.
  • The second gate stack is formed over a non-active region and consists of multiple gates.
  • The nanosheet stacks in the active region have first and second inner spacers.
  • The first and second inner spacers are vertically aligned with each other.
  • The first inner spacers directly contact the lower sidewalls of a source/drain epitaxial region.
  • This contact isolates the second gate stack from the STI region.

Potential Applications

  • This semiconductor device can be used in various electronic devices, such as smartphones, tablets, and computers.
  • It can be integrated into microprocessors, memory chips, and other semiconductor-based components.

Problems Solved

  • The design of the semiconductor device solves the problem of isolation between the second gate stack and the STI region.
  • By using the first inner spacers to directly contact the lower sidewalls of the source/drain epitaxial region, the second gate stack is effectively isolated.

Benefits

  • The use of two gate stacks, with the first stack taller than the second stack, allows for improved performance and functionality of the semiconductor device.
  • The direct contact between the first inner spacers and the lower sidewalls provides effective isolation, reducing the risk of interference or leakage.
  • This design enables better control and optimization of the device's electrical properties, leading to enhanced overall performance.


Original Abstract Submitted

A semiconductor device includes a first gate stack disposed over an active region and a second gate stack disposed over a shallow trench isolation (STI) region such that the first gate stack is taller than the second gate stack. The second gate stack includes a plurality of gates formed over a non-active region. The nanosheet stacks in the active region include first inner spacers and second inner spacers. The first inner spacers are vertically aligned with the second inner spacers. Further, the first inner spacers directly contact lower sidewalls of a source/drain epitaxial region to isolate the second gate stack from the STI region.

Retrieved from "http://wikipatents.org/index.php?title=17551402._FORMING_NS_GATES_WITH_IMPROVED_MECHANICAL_STABILITY_simplified_abstract_(INTERNATIONAL_BUSINESS_MACHINES_CORPORATION)&oldid=26317"