17551326. FACILITATING AUTOMATIC NON-LINEARITY CORRECTION FOR ANALOG HARDWARE simplified abstract (INTERNATIONAL BUSINESS MACHINES CORPORATION)
FACILITATING AUTOMATIC NON-LINEARITY CORRECTION FOR ANALOG HARDWARE
Organization Name
INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventor(s)
TAYFUN Gokmen of Briarcliff Manor NY (US)
FACILITATING AUTOMATIC NON-LINEARITY CORRECTION FOR ANALOG HARDWARE - A simplified explanation of the abstract
This abstract first appeared for US patent application 17551326 titled 'FACILITATING AUTOMATIC NON-LINEARITY CORRECTION FOR ANALOG HARDWARE
Simplified Explanation
The patent application describes techniques for automatic non-linearity correction in analog hardware. It proposes a system that includes a memory and a processor. The memory stores computer executable components, while the processor executes these components.
- The adjustment component determines a non-linear correction term for the output of an array of analog memories. This determination is based on the result of a matrix vector multiplication performed on the array of analog memories.
- The rectification component applies the non-linear correction term to additional outputs of the array of analog memories.
Potential Applications
- Analog hardware systems requiring non-linearity correction.
- Signal processing applications that involve analog memories.
Problems Solved
- Non-linearity in analog hardware can lead to inaccuracies in output signals.
- Manual correction of non-linearity can be time-consuming and prone to errors.
Benefits
- Automatic non-linearity correction improves the accuracy of output signals.
- The system eliminates the need for manual correction, saving time and reducing errors.
Original Abstract Submitted
Techniques facilitating automatic non-linearity correction for analog hardware are provided. A system can comprise a memory that stores computer executable components and a processor that executes the computer executable components stored in the memory. The computer executable components can comprise an adjustment component that determines a non-linear correction term for an output of an array of analog memories based on a result of a matrix vector multiplication performed on the array of analog memories. The computer executable components can also comprise a rectification component that applies the non-linear correction term to additional outputs of the array of analog memories.