17550465. VALIDATING MEMORY ACCESS PATTERNS OF STATIC PROGRAM CODE simplified abstract (INTERNATIONAL BUSINESS MACHINES CORPORATION)

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VALIDATING MEMORY ACCESS PATTERNS OF STATIC PROGRAM CODE

Organization Name

INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor(s)

Holger Horbach of Aidlingen (DE)

Cedric Lichtenau of Stuttgart (DE)

Simon Weishaupt of Stuttgart (DE)

Puja Sethia of Bengaluru (IN)

VALIDATING MEMORY ACCESS PATTERNS OF STATIC PROGRAM CODE - A simplified explanation of the abstract

This abstract first appeared for US patent application 17550465 titled 'VALIDATING MEMORY ACCESS PATTERNS OF STATIC PROGRAM CODE

Simplified Explanation

The abstract describes a computer system that validates memory access patterns of a static variant of a program instruction stream. The system randomizes input arguments, generates an address translation list for virtual addresses, and stores memory accesses in a table. It executes the program instruction stream on an accelerator processing unit, replacing virtual addresses with addresses from the translation list. It records and stores every memory access in a second table and compares the memory access patterns to those stored in the first table, validating or discarding them.

  • Computer system validates memory access patterns of a static variant of a program instruction stream
  • Randomizes input arguments and generates an address translation list for virtual addresses
  • Stores memory accesses in a table and executes the program instruction stream on an accelerator processing unit
  • Replaces virtual addresses with addresses from the translation list during execution
  • Records and stores every memory access in a second table
  • Compares memory access patterns to those stored in the first table
  • Validates or discards memory access patterns based on the comparison

Potential Applications

  • This technology can be used in software development and testing to validate memory access patterns of program instruction streams.
  • It can be applied in optimizing memory access performance in computer systems by identifying and discarding inefficient memory access patterns.

Problems Solved

  • The system solves the problem of validating memory access patterns in a static variant of a program instruction stream.
  • It addresses the challenge of efficiently comparing memory access patterns to identify valid or invalid patterns.

Benefits

  • The system provides a way to validate memory access patterns, ensuring the correctness and efficiency of program instruction streams.
  • It helps in identifying and discarding inefficient memory access patterns, leading to improved performance in computer systems.


Original Abstract Submitted

A computer system configured to perform operations for validating memory access patterns of a static variant of a program instruction stream, the operations including randomizing a first set of input arguments, generating an address translation list for virtual addresses based on memory access patterns and storing memory accesses in a first table, and executing the static variant of the program instruction stream on the accelerator processing unit. During execution, the virtual addresses may be discarded and replaced by the addresses provided in the address translation list. The operations may include recording and storing every memory access of executing the static variant of the program instruction stream in a second table and comparing the memory access patterns stored in the second table to memory accesses patterns stored in the first table. Memory access patterns may be validated or discarded.