17545143. CIRCUIT SERIALIZATION FOR PARAMETERIZED CIRCUIT SIMULATION simplified abstract (INTERNATIONAL BUSINESS MACHINES CORPORATION)

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CIRCUIT SERIALIZATION FOR PARAMETERIZED CIRCUIT SIMULATION

Organization Name

INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor(s)

Hiroshi Horii of Tokyo (JP)

Jun Doi of Yokohama (JP)

Christopher James Wood of Long Island City NY (US)

CIRCUIT SERIALIZATION FOR PARAMETERIZED CIRCUIT SIMULATION - A simplified explanation of the abstract

This abstract first appeared for US patent application 17545143 titled 'CIRCUIT SERIALIZATION FOR PARAMETERIZED CIRCUIT SIMULATION

Simplified Explanation

The patent application describes techniques for circuit serialization in parameterized-circuit simulation. It introduces a system that includes a processor executing computer executable components stored in memory.

  • The determination component identifies a first path and a second path of computational nodes in a parameter tree.
  • The first and second paths share one or more computational nodes at the beginning.
  • The serialization component creates a serialized path of computational nodes by combining the first and second paths.

Potential Applications

  • Parameterized-circuit simulation
  • Circuit design and optimization
  • Electronic system analysis

Problems Solved

  • Efficient simulation of parameterized circuits
  • Reducing computational complexity
  • Streamlining circuit analysis and optimization

Benefits

  • Improved performance and speed in circuit simulation
  • Simplified circuit design and analysis process
  • Enhanced accuracy in electronic system evaluation


Original Abstract Submitted

Techniques for circuit serialization for parameterized-circuit simulation are described. In one example, a system is provided that comprises a processor that executes computer executable components stored in memory. The computer executable components comprise a determination component that determines a first path of computational nodes and a second path of computational nodes of a parameter tree comprising a plurality of computational nodes, wherein the first path of computational nodes and the second path of computational nodes share one or more computational nodes at the beginning of the first path of computational nodes and the second path of computational nodes. The computer executable components further comprise a serialization component that creates a serialized path of computational nodes from the first path of computational nodes and the second path of computational nodes.