17545013. INTEGRATING GATE-CUTS AND SINGLE DIFFUSION BREAK ISOLATION POST-RMG USING LOW-TEMPERATURE PROTECTIVE LINERS simplified abstract (INTERNATIONAL BUSINESS MACHINES CORPORATION)

INTEGRATING GATE-CUTS AND SINGLE DIFFUSION BREAK ISOLATION POST-RMG USING LOW-TEMPERATURE PROTECTIVE LINERS

Organization Name

INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor(s)

Ruilong Xie of Niskayuna NY (US)

Balasubramanian S. Pranatharthiharan of Santa Clara CA (US)

Stuart Sieg of Albany NY (US)

Nelson Felix of Slingerlands NY (US)

Veeraraghavan S. Basker of Schenectady NY (US)

INTEGRATING GATE-CUTS AND SINGLE DIFFUSION BREAK ISOLATION POST-RMG USING LOW-TEMPERATURE PROTECTIVE LINERS - A simplified explanation of the abstract

This abstract first appeared for US patent application 17545013 titled 'INTEGRATING GATE-CUTS AND SINGLE DIFFUSION BREAK ISOLATION POST-RMG USING LOW-TEMPERATURE PROTECTIVE LINERS

Simplified Explanation

The abstract describes a method for fabricating an integrated circuit (IC) by forming transistors on a substrate. The method involves creating a sacrificial metal gate and a shared non-sacrificial metal gate. The sacrificial metal gate is recessed, and the shared non-sacrificial metal gate is also recessed to create a recessed shared non-sacrificial metal gate. A pattern is then formed over both gates, defining a diffusion break footprint on the sacrificial metal gate and a gate-cut footprint on the recessed shared non-sacrificial metal gate.

• The method involves fabricating transistors on a substrate.
• A sacrificial metal gate and a shared non-sacrificial metal gate are formed.
• The sacrificial metal gate is recessed, and the shared non-sacrificial metal gate is also recessed to create a recessed shared non-sacrificial metal gate.
• A pattern is formed over both gates, defining a diffusion break footprint on the sacrificial metal gate and a gate-cut footprint on the recessed shared non-sacrificial metal gate.

Potential applications of this technology:

• Integrated circuit fabrication
• Semiconductor manufacturing

Problems solved by this technology:

• Provides a method for fabricating transistors on a substrate
• Allows for the formation of sacrificial and non-sacrificial metal gates
• Enables the creation of diffusion break and gate-cut footprints

Benefits of this technology:

• Improved fabrication process for integrated circuits
• Enhanced control over transistor formation
• Increased efficiency in semiconductor manufacturing

Original Abstract Submitted

Embodiments of the invention are directed to a method of fabricating an integrated circuit (IC). The method includes performing fabrication operations to form transistors on a substrate. The fabrication operations include forming a sacrificial metal gate and forming a shared non-sacrificial metal gate. The sacrificial metal gate is recessed to form a sacrificial metal gate, and the shared non-sacrificial metal gate is recessed to form a recessed shared non-sacrificial metal gate. A pattern is formed over the sacrificial metal gate and the recessed shared non-sacrificial metal gate. The pattern defines a single diffusion break footprint over a top surface of the sacrificial metal gate, along with a gate-cut footprint over a central region of a top surface of the recessed shared non-sacrificial metal gate.