17544337. Etch Back and Film Profile Shaping of Selective Dielectric Deposition simplified abstract (INTERNATIONAL BUSINESS MACHINES CORPORATION)

Etch Back and Film Profile Shaping of Selective Dielectric Deposition

Organization Name

INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor(s)

Rudy J. Wojtecki of San Jose CA (US)

SON Nguyen of Schenectady NY (US)

Balasubramanian S. Pranatharthiharan of Santa Clara CA (US)

Cornelius Brown Peethala of Slingerlands NY (US)

Etch Back and Film Profile Shaping of Selective Dielectric Deposition - A simplified explanation of the abstract

This abstract first appeared for US patent application 17544337 titled 'Etch Back and Film Profile Shaping of Selective Dielectric Deposition

Simplified Explanation

The abstract describes a patent application for self-aligned semiconductor device structures and fabrication techniques. These structures involve embedding conductive elements in a dielectric material and selectively placing a second dielectric on top of the first dielectric. The second dielectric contains additional conductive elements that are fully aligned with the first conductive elements. A liner is used to separate the second dielectric from the second conductive elements. The patent also includes a method for forming these self-aligned semiconductor device structures.

• Self-aligned semiconductor device structures and fabrication techniques are described in a patent application.
• The structures involve embedding conductive elements in a dielectric material.
• A second dielectric is selectively placed on top of the first dielectric.
• The second dielectric contains additional conductive elements that are fully aligned with the first conductive elements.
• A liner is used to separate the second dielectric from the second conductive elements.
• The patent also includes a method for forming these self-aligned semiconductor device structures.

Potential Applications

• Semiconductor manufacturing
• Integrated circuit fabrication
• Electronics industry

Problems Solved

• Alignment issues in semiconductor device fabrication
• Improving the precision and accuracy of device structures
• Enhancing the performance and reliability of semiconductor devices

Benefits

• Improved alignment and accuracy of device structures
• Enhanced performance and reliability of semiconductor devices
• Simplified fabrication process
• Cost-effective manufacturing

Original Abstract Submitted

Self-aligned semiconductor device structures and techniques for fabrication thereof are provided. In one aspect, a self-aligned semiconductor device structure includes: at least one first conductive element embedded in a first dielectric; a second dielectric disposed selectively on the first dielectric relative to the at least one first conductive element; and at least one second conductive element present in the second dielectric that is fully aligned with the at least one first conductive element. A liner can be disposed on the second dielectric and which separates the second dielectric from the at least one second conductive element. A method of forming a self-aligned semiconductor device structure is also provided.