17541529. Fork Sheet with Reduced Coupling Effect simplified abstract (INTERNATIONAL BUSINESS MACHINES CORPORATION)

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Fork Sheet with Reduced Coupling Effect

Organization Name

INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor(s)

Ruilong Xie of Niskayuna NY (US)

Chun-Chen Yeh of Danbury CT (US)

Heng Wu of Guilderland NY (US)

Alexander Reznicek of Troy NY (US)

Fork Sheet with Reduced Coupling Effect - A simplified explanation of the abstract

This abstract first appeared for US patent application 17541529 titled 'Fork Sheet with Reduced Coupling Effect

Simplified Explanation

The abstract describes a patent application for fork sheet FET devices with airgap isolation. These devices consist of at least two nanosheet FETs and a dielectric pillar with an airgap between them. The nanosheets of the FETs extend horizontally on opposite sides of the dielectric pillar. The patent also includes a method for manufacturing these fork sheet FET devices.

  • Fork sheet FET devices with airgap isolation are provided.
  • The devices consist of at least two nanosheet FETs and a dielectric pillar with an airgap.
  • The nanosheets of the FETs extend horizontally on opposite sides of the dielectric pillar.
  • A method for manufacturing these fork sheet FET devices is also included.

Potential Applications

  • Integrated circuits
  • Electronics manufacturing
  • Semiconductor industry

Problems Solved

  • Improved isolation between nanosheet FETs
  • Enhanced performance and efficiency of integrated circuits
  • Reduction of cross-talk and interference in electronic devices

Benefits

  • Increased performance and efficiency of integrated circuits
  • Improved isolation between nanosheet FETs
  • Reduction of cross-talk and interference in electronic devices
  • Enhanced reliability and functionality of electronic devices


Original Abstract Submitted

Fork sheet FET devices with airgap isolation are provided. In one aspect, a fork sheet FET device includes: at least a first nanosheet FET and a second nanosheet FET; and a dielectric pillar disposed directly between the first nanosheet FET and the second nanosheet FET, wherein the dielectric pillar includes an airgap. For instance, the first nanosheet FET and the second nanosheet FET can have nanosheets that extend horizontally on opposite sides of the dielectric pillar. A method of forming a fork sheet FET device having airgap isolation is also provided.