STACKED NANOSHEET TRANSISTOR WITH DEFECT FREE CHANNEL

Organization Name

INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor(s)

STACKED NANOSHEET TRANSISTOR WITH DEFECT FREE CHANNEL - A simplified explanation of the abstract

This abstract first appeared for US patent application 17540315 titled 'STACKED NANOSHEET TRANSISTOR WITH DEFECT FREE CHANNEL

Simplified Explanation

The patent application describes a method for creating nanosheet devices with defect-free channels. Here are the key points:

A nanosheet stack is formed on a substrate, consisting of alternating layers of sacrificial material.
One layer of the sacrificial material is thicker than the others.
The sacrificial layers are removed, leaving behind semiconductor layers on the remaining sacrificial layers.
The semiconductor layers are divided into two sets.
The remaining sacrificial layers are removed, and an isolation dielectric is formed between the two sets of semiconductor layers.

Potential applications of this technology:

Nanosheet devices can be used in various electronic applications, such as transistors and integrated circuits.
The defect-free channels in the nanosheet devices can improve the performance and reliability of these electronic devices.

Problems solved by this technology:

Defects in the channels of nanosheet devices can negatively impact their performance and reliability.
The method described in the patent application helps to create defect-free channels, addressing this issue.

Benefits of this technology:

The resulting nanosheet devices have improved performance and reliability.
The method allows for precise control and formation of the semiconductor layers and isolation dielectric.
The use of sacrificial layers simplifies the manufacturing process of nanosheet devices.

Original Abstract Submitted

Embodiments of the present invention are directed to methods and resulting structures for nanosheet devices having defect free channels. In a non-limiting embodiment of the invention, a nanosheet stack is formed over a substrate. The nanosheet stack includes alternating first sacrificial layers and second sacrificial layers. One layer of the first sacrificial layers has a greater thickness than the remaining first sacrificial layers. The first sacrificial layers are removed and semiconductor layers are formed on surfaces of the second sacrificial layers. The semiconductor layers include a first set and a second set of semiconductor layers. The second sacrificial layers are removed and an isolation dielectric is formed between the first set and the second set of semiconductor layers.

17540315. STACKED NANOSHEET TRANSISTOR WITH DEFECT FREE CHANNEL simplified abstract (INTERNATIONAL BUSINESS MACHINES CORPORATION)

Contents

STACKED NANOSHEET TRANSISTOR WITH DEFECT FREE CHANNEL

Organization Name

Inventor(s)