17524107. INTERCONNECTS FORMED USING INTEGRATED DAMASCENE AND SUBTRACTIVE ETCH PROCESSING simplified abstract (International Business Machines Corporation)

From WikiPatents
Jump to navigation Jump to search

INTERCONNECTS FORMED USING INTEGRATED DAMASCENE AND SUBTRACTIVE ETCH PROCESSING

Organization Name

International Business Machines Corporation

Inventor(s)

Nicholas Anthony Lanzillo of Wynantskill NY (US)

Huai Huang of Clifton Park NY (US)

Hosadurga Shobha of Niskayuna NY (US)

Lawrence A. Clevenger of Saratoga Springs NY (US)

INTERCONNECTS FORMED USING INTEGRATED DAMASCENE AND SUBTRACTIVE ETCH PROCESSING - A simplified explanation of the abstract

This abstract first appeared for US patent application 17524107 titled 'INTERCONNECTS FORMED USING INTEGRATED DAMASCENE AND SUBTRACTIVE ETCH PROCESSING

Simplified Explanation

The patent application describes a semiconductor structure that includes interconnect lines of different widths in a specific level. The wider interconnect lines are positioned between two narrower interconnect lines. The narrower interconnect lines have sidewalls that taper inward, while the wider interconnect lines have sidewalls that taper outward.

  • The semiconductor structure includes interconnect lines of different widths in a specific level.
  • The wider interconnect lines are positioned between two narrower interconnect lines.
  • The narrower interconnect lines have inward tapering sidewalls.
  • The wider interconnect lines have outward tapering sidewalls.

Potential Applications:

  • Integrated circuits
  • Semiconductor devices
  • Electronic components

Problems Solved:

  • Efficient routing of interconnect lines in a semiconductor structure
  • Improved signal transmission and reduced crosstalk

Benefits:

  • Enhanced performance and reliability of semiconductor devices
  • Increased density of interconnect lines in a given space
  • Reduced signal interference and improved signal integrity


Original Abstract Submitted

A semiconductor structure comprises two or more interconnect lines of a first width in a given interconnect level, and two or more interconnect lines of a second width in the given interconnect level. The two or more interconnect lines of the second width are disposed between a first one of the two or more interconnect lines of the first width and a second one of the two or more interconnect lines of the second width. The two or more interconnect lines of the first width have sidewalls with a negative taper angle. The two or more interconnect lines of the second width have sidewalls with a positive taper angle.

Retrieved from "http://wikipatents.org/index.php?title=17524107._INTERCONNECTS_FORMED_USING_INTEGRATED_DAMASCENE_AND_SUBTRACTIVE_ETCH_PROCESSING_simplified_abstract_(International_Business_Machines_Corporation)&oldid=22391"